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Bin Mengafee3fb2015-02-02 22:35:28 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8
Bin Meng20c34112015-02-05 23:42:28 +08009#include <dt-bindings/mrc/quark.h>
Bin Meng05b98ec2015-05-25 22:35:06 +080010#include <dt-bindings/interrupt-router/intel-irq.h>
Bin Meng20c34112015-02-05 23:42:28 +080011
Bin Mengafee3fb2015-02-02 22:35:28 +080012/include/ "skeleton.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +080013/include/ "rtc.dtsi"
Bin Mengafee3fb2015-02-02 22:35:28 +080014
15/ {
16 model = "Intel Galileo";
17 compatible = "intel,galileo", "intel,quark";
18
Bin Meng0a9bb482015-04-15 12:00:11 +080019 aliases {
20 spi0 = "/spi";
21 };
22
Bin Mengafee3fb2015-02-02 22:35:28 +080023 config {
24 silent_console = <0>;
25 };
26
27 chosen {
28 stdout-path = &pciuart0;
29 };
30
Bin Meng20c34112015-02-05 23:42:28 +080031 mrc {
32 compatible = "intel,quark-mrc";
33 flags = <MRC_FLAG_SCRAMBLE_EN>;
34 dram-width = <DRAM_WIDTH_X8>;
35 dram-speed = <DRAM_FREQ_800>;
36 dram-type = <DRAM_TYPE_DDR3>;
37 rank-mask = <DRAM_RANK(0)>;
38 chan-mask = <DRAM_CHANNEL(0)>;
39 chan-width = <DRAM_CHANNEL_WIDTH_X16>;
40 addr-mode = <DRAM_ADDR_MODE0>;
41 refresh-rate = <DRAM_REFRESH_RATE_785US>;
42 sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
43 ron-value = <DRAM_RON_34OHM>;
44 rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
45 rd-odt-value = <DRAM_RD_ODT_OFF>;
46 dram-density = <DRAM_DENSITY_1G>;
47 dram-cl = <6>;
48 dram-ras = <0x0000927c>;
49 dram-wtr = <0x00002710>;
50 dram-rrd = <0x00002710>;
51 dram-faw = <0x00009c40>;
52 };
53
Bin Mengafee3fb2015-02-02 22:35:28 +080054 pci {
55 #address-cells = <3>;
56 #size-cells = <2>;
Bin Meng31b5aeb2015-09-03 05:37:26 -070057 compatible = "pci-x86";
58 u-boot,dm-pre-reloc;
59 ranges = <0x02000000 0x0 0x90000000 0x90000000 0 0x20000000
60 0x42000000 0x0 0xb0000000 0xb0000000 0 0x20000000
61 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
Bin Mengafee3fb2015-02-02 22:35:28 +080062
63 pciuart0: uart@14,5 {
64 compatible = "pci8086,0936.00",
65 "pci8086,0936",
66 "pciclass,070002",
67 "pciclass,0700",
68 "x86-uart";
Bin Meng31b5aeb2015-09-03 05:37:26 -070069 u-boot,dm-pre-reloc;
Bin Mengafee3fb2015-02-02 22:35:28 +080070 reg = <0x0000a500 0x0 0x0 0x0 0x0
71 0x0200a510 0x0 0x0 0x0 0x0>;
72 reg-shift = <2>;
73 clock-frequency = <44236800>;
74 current-speed = <115200>;
75 };
Bin Meng05b98ec2015-05-25 22:35:06 +080076
77 irq-router@1f,0 {
78 reg = <0x0000f800 0 0 0 0>;
79 compatible = "intel,irq-router";
80 intel,pirq-config = "pci";
81 intel,pirq-link = <0x60 8>;
82 intel,pirq-mask = <0xdef8>;
83 intel,pirq-routing = <
84 PCI_BDF(0, 20, 0) INTA PIRQE
85 PCI_BDF(0, 20, 1) INTB PIRQF
86 PCI_BDF(0, 20, 2) INTC PIRQG
87 PCI_BDF(0, 20, 3) INTD PIRQH
88 PCI_BDF(0, 20, 4) INTA PIRQE
89 PCI_BDF(0, 20, 5) INTB PIRQF
90 PCI_BDF(0, 20, 6) INTC PIRQG
91 PCI_BDF(0, 20, 7) INTD PIRQH
92 PCI_BDF(0, 21, 0) INTA PIRQE
93 PCI_BDF(0, 21, 1) INTB PIRQF
94 PCI_BDF(0, 21, 2) INTC PIRQG
Bin Meng5bf0f7f2015-09-09 23:20:28 -070095 PCI_BDF(0, 23, 0) INTA PIRQA
96 PCI_BDF(0, 23, 1) INTB PIRQB
97
98 /* PCIe root ports downstream interrupts */
99 PCI_BDF(1, 0, 0) INTA PIRQA
100 PCI_BDF(1, 0, 0) INTB PIRQB
101 PCI_BDF(1, 0, 0) INTC PIRQC
102 PCI_BDF(1, 0, 0) INTD PIRQD
103 PCI_BDF(2, 0, 0) INTA PIRQB
104 PCI_BDF(2, 0, 0) INTB PIRQC
105 PCI_BDF(2, 0, 0) INTC PIRQD
106 PCI_BDF(2, 0, 0) INTD PIRQA
Bin Meng05b98ec2015-05-25 22:35:06 +0800107 >;
108 };
Bin Mengafee3fb2015-02-02 22:35:28 +0800109 };
110
Bin Mengd8b1d222015-02-04 16:26:10 +0800111 gpioa {
112 compatible = "intel,ich6-gpio";
113 u-boot,dm-pre-reloc;
114 reg = <0 0x20>;
115 bank-name = "A";
116 };
117
118 gpiob {
119 compatible = "intel,ich6-gpio";
120 u-boot,dm-pre-reloc;
121 reg = <0x20 0x20>;
122 bank-name = "B";
123 };
124
Bin Meng728b3932015-02-04 16:26:12 +0800125 spi {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 compatible = "intel,ich-spi";
129 spi-flash@0 {
130 #size-cells = <1>;
131 #address-cells = <1>;
132 reg = <0>;
133 compatible = "winbond,w25q64", "spi-flash";
134 memory-map = <0xff800000 0x00800000>;
Bin Meng06f16c42015-10-12 01:30:43 -0700135 rw-mrc-cache {
136 label = "rw-mrc-cache";
137 reg = <0x00010000 0x00010000>;
138 };
Bin Meng728b3932015-02-04 16:26:12 +0800139 };
140 };
141
Bin Mengafee3fb2015-02-02 22:35:28 +0800142};