wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 1 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 2 | u-boot for the TI OMAP730 Perseus2 |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 3 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 4 | Dave Peverley, MPC-Data Limited |
| 5 | http://www.mpc-data.co.uk |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 6 | |
| 7 | |
| 8 | Overview : |
| 9 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 10 | As the OMAP730 is similar to the OMAP1610 in many ways, this port was based |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 11 | on the u-boot port to the OMAP1610 Innovator. Supported features are : |
| 12 | |
| 13 | - Serial terminal support |
| 14 | - Onboard NOR Flash |
| 15 | - Ethernet via the seperate debug board |
| 16 | - Tested on Rev4 and Rev5 boards |
| 17 | |
| 18 | It has also been tested to work correctly when built with a 'standard' GCC |
| 19 | 3.2.1 cross-compiler as well as Montavista Linux CEE 3.1's toolchain. |
| 20 | |
| 21 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 22 | Hardware Configuration : |
| 23 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 24 | The main dips on the P2 board should be set to 2,3,7 and 9 on with all |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 25 | others off. On the debug board, dips 1 and 7 should be on with the rest off. |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 26 | The serial console has been set up to run from the DB9 connector on the |
| 27 | P2 board at 115200 baud, 8 data bits, no stop bits, 1 parity bit. |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 28 | |
| 29 | It should be noted that the P2 board has NOR flash that is addressable via |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 30 | either CS0 or CS3. This mode can be changed via DIP9 on the P2 board. |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 31 | |
| 32 | |
| 33 | Installing u-boot for the P2 : |
| 34 | |
| 35 | You can simply build u-boot for the Perseus by following the instructions |
| 36 | in the main readme file. The target configuration is "omap730p2_config". |
| 37 | Once u-boot has been built, you should strip the executable so it can be |
| 38 | loaded via CCS (which cant cope with the symbols in the ELF binary) : |
| 39 | $ cp u-boot u-boot.out |
| 40 | $ arm-linux-strip u-boot.out |
| 41 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 42 | The method we've used for installing u-boot the first time on a P2 is |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 43 | as follows : |
| 44 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 45 | 1) Configure TI Code Composer Studio to connect to the P2 board via JTAG |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 46 | as described in the Users Guide. |
| 47 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 48 | 2) Set up the P2 to boot from CS3, and connect with CCS. Reset the CPU |
| 49 | and run the "init_mmu" GEL script. |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 50 | |
| 51 | 3) Use the "Load Program" option to send the u-boot.out file to the P2 and |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 52 | run. |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 53 | |
| 54 | At this point, u-boot should run and you will see the boot menu on your |
| 55 | serial terminal. You can then load the u-boot image to memory : |
| 56 | |
| 57 | # loadb 0x10000000 |
| 58 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 59 | Send the "u-boot.bin" binary via the serial using Kermit. Once loaded |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 60 | you can self-flash u-boot : |
| 61 | |
| 62 | # protect off 1:0 |
| 63 | # erase 1:0 |
| 64 | # cp.b 0x10000000 0x0 0x20000 |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 65 | |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 66 | You should now be able to reset the board and run u-boot from flash. |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 67 | |
| 68 | |
| 69 | Alternative flash option : |
| 70 | |
| 71 | Sometimes, if you've been silly, you can get the board into a state where |
| 72 | whats in flash has upset the board so much that you can no longer connect |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 73 | to the P2 via JTAG. However, you can set DIP9 to off to swap the boot mode |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 74 | of the P2 so that you boot from RAM instead of NOR flash. This moves NOR |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 75 | flash up to 0x0C000000. You can build a special version of u-boot to |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 76 | utilise this by the following config : |
| 77 | |
| 78 | $ make omap730p2_cs0boot_config |
| 79 | |
| 80 | If you load this up via CCS it will detect flash at its alternate location |
| 81 | and allow you to programme your u-boot image (which, remember must be built |
| 82 | for CS3 boot!) Once you do this, you can revert to CS3 boot and it will work |
| 83 | fine again. |
| 84 | |
| 85 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 86 | Errata : |
| 87 | |
| 88 | 1) It's been observed that sometimes the tftp transfer of kernels to the |
wdenk | 1eaeb58 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 89 | board can have checksum errors or stall. This appears to be an issue |
| 90 | with the lan91c96.c driver, and can normally be worked around by |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 91 | resetting the board and trying again. |