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gerrit.cesnet.cz / github / trini / u-boot / 9802154a94d6a22c5e1b4750d1b573c51afeb8fd / . / configs / ls1043aqds_qspi_defconfig
blob: 1c61e79c64aefa9e0122863b471a9efd6ad13501 [file] [log] [blame]
Qianyu Gongb0f20ca2016-01-25 15:16:07 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1043AQDS=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rini98021542021-11-01 12:19:22 +0000[diff] [blame^]4CONFIG_SYS_MALLOC_LEN=0x102000
Tom Rini554e5512020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=2
Tom Rini53def462020-11-30 12:50:32 -0500[diff] [blame]6CONFIG_SYS_MEMTEST_START=0x80000000
7CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x2000
Tom Rini052170c2020-01-22 13:38:00 -0500[diff] [blame]9CONFIG_ENV_OFFSET=0x300000
Tom Rini556fd592020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini15e7b762021-08-18 23:12:33 -0400[diff] [blame]11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_SYS_I2C_MXC_I2C2=y
13CONFIG_SYS_I2C_MXC_I2C3=y
14CONFIG_SYS_I2C_MXC_I2C4=y
Tom Rini556fd592020-04-28 16:15:47 -0400[diff] [blame]15CONFIG_DM_GPIO=y
Tom Rinif7d0ae92020-07-28 08:46:52 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
Tom Rinidf59b7d2021-07-26 21:10:37 -0400[diff] [blame]17CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]18CONFIG_FSL_LS_PPA=y
Peng Ma0833d952019-01-30 19:13:32 +0800[diff] [blame]19CONFIG_AHCI=y
Tom Rinifa2c1462018-02-10 16:54:38 -0500[diff] [blame]20CONFIG_DISTRO_DEFAULTS=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]21CONFIG_FIT_VERBOSE=y
22CONFIG_OF_BOARD_SETUP=y
Tom Rini6f0aea32016-06-27 22:40:17 -0400[diff] [blame]23CONFIG_QSPI_BOOT=y
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]24CONFIG_BOOTDELAY=10
Sam Protsenko5abc1a42017-08-14 20:22:17 +0300[diff] [blame]25CONFIG_USE_BOOTARGS=y
26CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
Tom Rinifa2c1462018-02-10 16:54:38 -0500[diff] [blame]27# CONFIG_USE_BOOTCOMMAND is not set
Adam Ford8ccf98b2018-07-29 13:13:29 -0500[diff] [blame]28CONFIG_MISC_INIT_R=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_BOOTZ=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]30CONFIG_CMD_GREPENV=y
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]31CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_MEMINFO=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]33CONFIG_CMD_MEMTEST=y
Biwen Li614d28b2021-02-05 19:02:10 +0800[diff] [blame]34CONFIG_CMD_GPIO=y
Tom Rini61444382021-02-15 13:34:30 -0500[diff] [blame]35CONFIG_CMD_GPT=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]36CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]37CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]38CONFIG_CMD_USB=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]39CONFIG_CMD_CACHE=y
Siva Durga Prasad Paladugu0fd2290c2018-06-19 12:24:23 +0200[diff] [blame]40CONFIG_MP=y
Tom Rini43ede0b2017-10-22 17:55:07 -0400[diff] [blame]41CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
Qianyu Gongb0f20ca2016-01-25 15:16:07 +0800[diff] [blame]42CONFIG_OF_CONTROL=y
Adam Forde91907a2020-07-03 06:48:56 -0500[diff] [blame]43CONFIG_ENV_OVERWRITE=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]44CONFIG_ENV_IS_IN_SPI_FLASH=y
Kuldeep Singhb42f7172021-07-07 12:10:24 +0530[diff] [blame]45CONFIG_ENV_ADDR=0x40300000
Tom Rini8d8ee472019-11-12 22:46:36 -0500[diff] [blame]46CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Qianyu Gongb0f20ca2016-01-25 15:16:07 +0800[diff] [blame]47CONFIG_DM=y
Peng Ma0833d952019-01-30 19:13:32 +0800[diff] [blame]48CONFIG_SATA_CEVA=y
Tom Rini28522672017-03-01 16:51:58 -0500[diff] [blame]49CONFIG_FSL_CAAM=y
Tom Riniefb5dab72021-08-21 13:50:17 -0400[diff] [blame]50CONFIG_DYNAMIC_DDR_CLK_FREQ=y
Tom Rini95372162021-08-21 13:50:18 -0400[diff] [blame]51CONFIG_DDR_ECC=y
52CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini556fd592020-04-28 16:15:47 -0400[diff] [blame]53CONFIG_DM_I2C=y
Tom Rini55dabcc2021-08-18 23:12:24 -0400[diff] [blame]54CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rini52c7e372021-08-18 23:12:25 -0400[diff] [blame]55CONFIG_SYS_I2C_EARLY_INIT=y
Tom Rinifc8d3b92021-08-18 23:12:37 -0400[diff] [blame]56CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]57CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six07dea2e2018-03-28 14:38:19 +0200[diff] [blame]58CONFIG_FSL_ESDHC=y
Ashish Kumarbc475d02019-07-09 14:50:15 +0530[diff] [blame]59# CONFIG_SPI_FLASH_BAR is not set
Kuldeep Singh6146f752020-05-12 14:28:56 +0530[diff] [blame]60CONFIG_SPI_FLASH_SPANSION=y
Alexandru Gagniuc3146f0c2017-08-01 17:19:59 -0700[diff] [blame]61CONFIG_PHYLIB=y
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]62CONFIG_PHYLIB_10G=y
63CONFIG_PHY_REALTEK=y
64CONFIG_PHY_VITESSE=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]65CONFIG_E1000=y
Tom Rinicc1e98b2019-05-12 07:59:12 -0400[diff] [blame]66CONFIG_FMAN_ENET=y
Tom Rinicdeb7b82020-10-29 10:48:01 -0400[diff] [blame]67CONFIG_NVME=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]68CONFIG_PCI=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]69CONFIG_DM_PCI_COMPAT=y
Hou Zhiqianged188aa2020-07-09 23:31:42 +0800[diff] [blame]70CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rinicc1e98b2019-05-12 07:59:12 -0400[diff] [blame]71CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
Peng Ma0833d952019-01-30 19:13:32 +0800[diff] [blame]72CONFIG_DM_SCSI=y
Bin Meng6b336872016-03-21 06:47:40 -0700[diff] [blame]73CONFIG_SYS_NS16550=y
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]74CONFIG_SPI=y
Tom Riniaca5cd22016-09-08 16:11:59 -0400[diff] [blame]75CONFIG_DM_SPI=y
Ashish Kumarbc475d02019-07-09 14:50:15 +0530[diff] [blame]76CONFIG_FSL_QSPI=y
Masahiro Yamada0a8cc1a2016-06-04 07:35:03 +0900[diff] [blame]77CONFIG_USB=y
78CONFIG_USB_XHCI_HCD=y
Masahiro Yamada10db7502016-06-04 07:35:04 +0900[diff] [blame]79CONFIG_USB_XHCI_DWC3=y