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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shenf1960442014-11-10 15:46:22 +08002/*
3 * Configuration settings for the SAMA5D4 Xplained ultra board.
4 *
5 * Copyright (C) 2014 Atmel
6 * Bo Shen <voice.shen@atmel.com>
Bo Shenf1960442014-11-10 15:46:22 +08007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Wu, Joshb2d387b2015-03-30 14:51:19 +080012#include "at91-sama5_common.h"
Bo Shenf1960442014-11-10 15:46:22 +080013
Bo Shenf1960442014-11-10 15:46:22 +080014/* SDRAM */
Wenyou Yange61ed482017-09-14 11:07:42 +080015#define CONFIG_SYS_SDRAM_BASE 0x20000000
Bo Shenf1960442014-11-10 15:46:22 +080016#define CONFIG_SYS_SDRAM_SIZE 0x20000000
17
Bo Shen0b2a9822014-12-15 13:24:39 +080018#ifdef CONFIG_SPL_BUILD
Wenyou Yang6dbadb42017-04-13 10:31:16 +080019#define CONFIG_SYS_INIT_SP_ADDR 0x218000
Bo Shen0b2a9822014-12-15 13:24:39 +080020#else
Bo Shenf1960442014-11-10 15:46:22 +080021#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang6dbadb42017-04-13 10:31:16 +080022 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen0b2a9822014-12-15 13:24:39 +080023#endif
Bo Shenf1960442014-11-10 15:46:22 +080024
25#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
26
Bo Shenf1960442014-11-10 15:46:22 +080027/* NAND flash */
Bo Shenf1960442014-11-10 15:46:22 +080028#ifdef CONFIG_CMD_NAND
Bo Shenf1960442014-11-10 15:46:22 +080029#define CONFIG_SYS_MAX_NAND_DEVICE 1
Wenyou Yange61ed482017-09-14 11:07:42 +080030#define CONFIG_SYS_NAND_BASE 0x80000000
Bo Shenf1960442014-11-10 15:46:22 +080031/* our ALE is AD21 */
32#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
33/* our CLE is AD22 */
34#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
35#define CONFIG_SYS_NAND_ONFI_DETECTION
Bo Shenf1960442014-11-10 15:46:22 +080036#endif
37
Bo Shen0b2a9822014-12-15 13:24:39 +080038/* SPL */
Wenyou Yang6dbadb42017-04-13 10:31:16 +080039#define CONFIG_SPL_MAX_SIZE 0x18000
Bo Shen0b2a9822014-12-15 13:24:39 +080040#define CONFIG_SPL_BSS_START_ADDR 0x20000000
41#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
42#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
43#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
44
Bo Shen0b2a9822014-12-15 13:24:39 +080045#define CONFIG_SYS_MONITOR_LEN (512 << 10)
46
Wenyou Yang55415432017-09-14 11:07:44 +080047#ifdef CONFIG_SD_BOOT
Bo Shen0b2a9822014-12-15 13:24:39 +080048#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
49#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Wenyou Yang55415432017-09-14 11:07:44 +080050#elif CONFIG_NAND_BOOT
Bo Shen0b2a9822014-12-15 13:24:39 +080051#define CONFIG_SPL_NAND_DRIVERS
52#define CONFIG_SPL_NAND_BASE
Wenyou Yang55415432017-09-14 11:07:44 +080053#endif
Bo Shen0b2a9822014-12-15 13:24:39 +080054#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
55#define CONFIG_SYS_NAND_5_ADDR_CYCLE
56#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
57#define CONFIG_SYS_NAND_PAGE_COUNT 64
58#define CONFIG_SYS_NAND_OOBSIZE 224
59#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
60#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
Bo Shen0b2a9822014-12-15 13:24:39 +080061
Bo Shenf1960442014-11-10 15:46:22 +080062#endif