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Prafulla Wadaskar5710de42009-05-30 01:13:33 +05301/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * Derived from drivers/spi/mpc8xxx_spi.c
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Prafulla Wadaskar5710de42009-05-30 01:13:33 +05309 */
10
11#include <common.h>
Stefan Roese9985bdb2015-11-20 13:39:43 +010012#include <dm.h>
Prafulla Wadaskar5710de42009-05-30 01:13:33 +053013#include <malloc.h>
14#include <spi.h>
Lei Wena7efd712011-10-18 20:11:42 +053015#include <asm/io.h>
Stefan Roese3dc23f72014-10-22 12:13:06 +020016#include <asm/arch/soc.h>
Stefan Roese4aceea22014-10-22 12:13:10 +020017#ifdef CONFIG_KIRKWOOD
Prafulla Wadaskar5710de42009-05-30 01:13:33 +053018#include <asm/arch/mpp.h>
Stefan Roese4aceea22014-10-22 12:13:10 +020019#endif
Stefan Roese3e972cb2014-10-22 12:13:07 +020020#include <asm/arch-mvebu/spi.h>
Prafulla Wadaskar5710de42009-05-30 01:13:33 +053021
Stefan Roese9985bdb2015-11-20 13:39:43 +010022static void _spi_cs_activate(struct kwspi_registers *reg)
23{
24 setbits_le32(&reg->ctrl, KWSPI_CSN_ACT);
25}
26
27static void _spi_cs_deactivate(struct kwspi_registers *reg)
28{
29 clrbits_le32(&reg->ctrl, KWSPI_CSN_ACT);
30}
31
32static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen,
33 const void *dout, void *din, unsigned long flags)
34{
35 unsigned int tmpdout, tmpdin;
36 int tm, isread = 0;
37
38 debug("spi_xfer: dout %p din %p bitlen %u\n", dout, din, bitlen);
39
40 if (flags & SPI_XFER_BEGIN)
41 _spi_cs_activate(reg);
42
43 /*
44 * handle data in 8-bit chunks
45 * TBD: 2byte xfer mode to be enabled
46 */
47 clrsetbits_le32(&reg->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE);
48
49 while (bitlen > 4) {
50 debug("loopstart bitlen %d\n", bitlen);
51 tmpdout = 0;
52
53 /* Shift data so it's msb-justified */
54 if (dout)
55 tmpdout = *(u32 *)dout & 0xff;
56
57 clrbits_le32(&reg->irq_cause, KWSPI_SMEMRDIRQ);
58 writel(tmpdout, &reg->dout); /* Write the data out */
59 debug("*** spi_xfer: ... %08x written, bitlen %d\n",
60 tmpdout, bitlen);
61
62 /*
63 * Wait for SPI transmit to get out
64 * or time out (1 second = 1000 ms)
65 * The NE event must be read and cleared first
66 */
67 for (tm = 0, isread = 0; tm < KWSPI_TIMEOUT; ++tm) {
68 if (readl(&reg->irq_cause) & KWSPI_SMEMRDIRQ) {
69 isread = 1;
70 tmpdin = readl(&reg->din);
71 debug("spi_xfer: din %p..%08x read\n",
72 din, tmpdin);
73
74 if (din) {
75 *((u8 *)din) = (u8)tmpdin;
76 din += 1;
77 }
78 if (dout)
79 dout += 1;
80 bitlen -= 8;
81 }
82 if (isread)
83 break;
84 }
85 if (tm >= KWSPI_TIMEOUT)
86 printf("*** spi_xfer: Time out during SPI transfer\n");
87
88 debug("loopend bitlen %d\n", bitlen);
89 }
90
91 if (flags & SPI_XFER_END)
92 _spi_cs_deactivate(reg);
93
94 return 0;
95}
96
97#ifndef CONFIG_DM_SPI
98
Stefan Roese4fd77172014-10-22 12:13:12 +020099static struct kwspi_registers *spireg =
100 (struct kwspi_registers *)MVEBU_SPI_BASE;
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530101
Stefan Roese4aceea22014-10-22 12:13:10 +0200102#ifdef CONFIG_KIRKWOOD
Stefan Roese02990462014-09-02 14:02:52 +0200103static u32 cs_spi_mpp_back[2];
Stefan Roese4aceea22014-10-22 12:13:10 +0200104#endif
Valentin Longchampca880672012-06-01 01:31:01 +0000105
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530106struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
107 unsigned int max_hz, unsigned int mode)
108{
109 struct spi_slave *slave;
110 u32 data;
Stefan Roese4aceea22014-10-22 12:13:10 +0200111#ifdef CONFIG_KIRKWOOD
Albert ARIBAUD9d86f0c2012-11-26 11:27:36 +0000112 static const u32 kwspi_mpp_config[2][2] = {
113 { MPP0_SPI_SCn, 0 }, /* if cs == 0 */
114 { MPP7_SPI_SCn, 0 } /* if cs != 0 */
115 };
Stefan Roese4aceea22014-10-22 12:13:10 +0200116#endif
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530117
118 if (!spi_cs_is_valid(bus, cs))
119 return NULL;
120
Simon Glassd3504fe2013-03-18 19:23:40 +0000121 slave = spi_alloc_slave_base(bus, cs);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530122 if (!slave)
123 return NULL;
124
Stefan Roesec0321742014-09-02 14:02:51 +0200125 writel(KWSPI_SMEMRDY, &spireg->ctrl);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530126
127 /* calculate spi clock prescaller using max_hz */
Valentin Longchamp8203b202012-08-15 05:31:49 +0000128 data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
129 data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data;
130 data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data;
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530131
132 /* program spi clock prescaller using max_hz */
133 writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg);
Stefan Roesebf9b86d2014-09-02 14:02:53 +0200134 debug("data = 0x%08x\n", data);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530135
136 writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
Ian Campbell3f843552012-01-12 06:10:22 +0000137 writel(KWSPI_IRQMASK, &spireg->irq_mask);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530138
Stefan Roese4aceea22014-10-22 12:13:10 +0200139#ifdef CONFIG_KIRKWOOD
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530140 /* program mpp registers to select SPI_CSn */
Albert ARIBAUD9d86f0c2012-11-26 11:27:36 +0000141 kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
Stefan Roese4aceea22014-10-22 12:13:10 +0200142#endif
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530143
144 return slave;
145}
146
147void spi_free_slave(struct spi_slave *slave)
148{
Stefan Roese4aceea22014-10-22 12:13:10 +0200149#ifdef CONFIG_KIRKWOOD
Valentin Longchampca880672012-06-01 01:31:01 +0000150 kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
Stefan Roese4aceea22014-10-22 12:13:10 +0200151#endif
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530152 free(slave);
153}
154
Valentin Longchampac486e32012-06-01 01:31:02 +0000155#if defined(CONFIG_SYS_KW_SPI_MPP)
156u32 spi_mpp_backup[4];
157#endif
158
Valentin Longchamp24934fe2012-06-01 01:31:03 +0000159__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
160{
161 return 0;
162}
163
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530164int spi_claim_bus(struct spi_slave *slave)
165{
Valentin Longchampac486e32012-06-01 01:31:02 +0000166#if defined(CONFIG_SYS_KW_SPI_MPP)
167 u32 config;
168 u32 spi_mpp_config[4];
169
170 config = CONFIG_SYS_KW_SPI_MPP;
171
172 if (config & MOSI_MPP6)
173 spi_mpp_config[0] = MPP6_SPI_MOSI;
174 else
175 spi_mpp_config[0] = MPP1_SPI_MOSI;
176
177 if (config & SCK_MPP10)
178 spi_mpp_config[1] = MPP10_SPI_SCK;
179 else
180 spi_mpp_config[1] = MPP2_SPI_SCK;
181
182 if (config & MISO_MPP11)
183 spi_mpp_config[2] = MPP11_SPI_MISO;
184 else
185 spi_mpp_config[2] = MPP3_SPI_MISO;
186
187 spi_mpp_config[3] = 0;
188 spi_mpp_backup[3] = 0;
189
190 /* set new spi mpp and save current mpp config */
191 kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup);
Valentin Longchampac486e32012-06-01 01:31:02 +0000192#endif
193
Valentin Longchamp24934fe2012-06-01 01:31:03 +0000194 return board_spi_claim_bus(slave);
195}
196
197__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave)
198{
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530199}
200
201void spi_release_bus(struct spi_slave *slave)
202{
Valentin Longchampac486e32012-06-01 01:31:02 +0000203#if defined(CONFIG_SYS_KW_SPI_MPP)
204 kirkwood_mpp_conf(spi_mpp_backup, NULL);
205#endif
Valentin Longchamp24934fe2012-06-01 01:31:03 +0000206
207 board_spi_release_bus(slave);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530208}
209
210#ifndef CONFIG_SPI_CS_IS_VALID
211/*
212 * you can define this function board specific
213 * define above CONFIG in board specific config file and
214 * provide the function in board specific src file
215 */
216int spi_cs_is_valid(unsigned int bus, unsigned int cs)
217{
Stefan Roesebf9b86d2014-09-02 14:02:53 +0200218 return bus == 0 && (cs == 0 || cs == 1);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530219}
220#endif
221
Michael Walleefa4e432011-10-18 20:12:00 +0530222void spi_init(void)
223{
224}
225
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530226void spi_cs_activate(struct spi_slave *slave)
227{
Stefan Roese18dd3b22015-11-20 08:44:21 +0100228 _spi_cs_activate(spireg);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530229}
230
231void spi_cs_deactivate(struct spi_slave *slave)
232{
Stefan Roese18dd3b22015-11-20 08:44:21 +0100233 _spi_cs_deactivate(spireg);
Prafulla Wadaskar5710de42009-05-30 01:13:33 +0530234}
235
Stefan Roese18dd3b22015-11-20 08:44:21 +0100236int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
237 const void *dout, void *din, unsigned long flags)
238{
239 return _spi_xfer(spireg, bitlen, dout, din, flags);
240}
Stefan Roese9985bdb2015-11-20 13:39:43 +0100241
242#else
243
244/* Here now the DM part */
245
246struct mvebu_spi_platdata {
247 struct kwspi_registers *spireg;
248};
249
250struct mvebu_spi_priv {
251 struct kwspi_registers *spireg;
252};
253
254static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
255{
256 struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
257 struct kwspi_registers *reg = plat->spireg;
258 u32 data;
259
260 /* calculate spi clock prescaller using max_hz */
261 data = ((CONFIG_SYS_TCLK / 2) / hz) + 0x10;
262 data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data;
263 data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data;
264
265 /* program spi clock prescaler using max_hz */
266 writel(KWSPI_ADRLEN_3BYTE | data, &reg->cfg);
267 debug("data = 0x%08x\n", data);
268
269 return 0;
270}
271
272static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
273{
274 return 0;
275}
276
277static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,
278 const void *dout, void *din, unsigned long flags)
279{
280 struct udevice *bus = dev->parent;
281 struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
282
283 return _spi_xfer(plat->spireg, bitlen, dout, din, flags);
284}
285
286static int mvebu_spi_probe(struct udevice *bus)
287{
288 struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
289 struct kwspi_registers *reg = plat->spireg;
290
291 writel(KWSPI_SMEMRDY, &reg->ctrl);
292 writel(KWSPI_SMEMRDIRQ, &reg->irq_cause);
293 writel(KWSPI_IRQMASK, &reg->irq_mask);
294
295 return 0;
296}
297
298static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)
299{
300 struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
301
302 plat->spireg = (struct kwspi_registers *)dev_get_addr(bus);
303
304 return 0;
305}
306
307static const struct dm_spi_ops mvebu_spi_ops = {
308 .xfer = mvebu_spi_xfer,
309 .set_speed = mvebu_spi_set_speed,
310 .set_mode = mvebu_spi_set_mode,
311 /*
312 * cs_info is not needed, since we require all chip selects to be
313 * in the device tree explicitly
314 */
315};
316
317static const struct udevice_id mvebu_spi_ids[] = {
Stefan Roese951f1b52016-01-29 10:04:15 +0100318 { .compatible = "marvell,armada-375-spi" },
Stefan Roese9985bdb2015-11-20 13:39:43 +0100319 { .compatible = "marvell,armada-380-spi" },
320 { .compatible = "marvell,armada-xp-spi" },
321 { }
322};
323
324U_BOOT_DRIVER(mvebu_spi) = {
325 .name = "mvebu_spi",
326 .id = UCLASS_SPI,
327 .of_match = mvebu_spi_ids,
328 .ops = &mvebu_spi_ops,
329 .ofdata_to_platdata = mvebu_spi_ofdata_to_platdata,
330 .platdata_auto_alloc_size = sizeof(struct mvebu_spi_platdata),
331 .priv_auto_alloc_size = sizeof(struct mvebu_spi_priv),
332 .probe = mvebu_spi_probe,
333};
334#endif