blob: 80166e3e6a28a67f9285c635b2392bc8e2f77d00 [file] [log] [blame]
Bastien Curutchet94e45f72024-10-21 17:13:29 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * DaVinci / Keystone2 : AEMIF's chip select configuration
4 *
5 */
6#include <asm/io.h>
7#include <clk.h>
8#include <dm.h>
9#include "ti-aemif-cs.h"
10
11#define AEMIF_CONFIG(cs) (0x10 + ((cs) * 4))
12
13#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
14#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
15#define AEMIF_CFG_WR_SETUP(v) (((v) & 0x0f) << 26)
16#define AEMIF_CFG_WR_STROBE(v) (((v) & 0x3f) << 20)
17#define AEMIF_CFG_WR_HOLD(v) (((v) & 0x07) << 17)
18#define AEMIF_CFG_RD_SETUP(v) (((v) & 0x0f) << 13)
19#define AEMIF_CFG_RD_STROBE(v) (((v) & 0x3f) << 7)
20#define AEMIF_CFG_RD_HOLD(v) (((v) & 0x07) << 4)
21#define AEMIF_CFG_TURN_AROUND(v) (((v) & 0x03) << 2)
22#define AEMIF_CFG_WIDTH(v) (((v) & 0x03) << 0)
23
24#define set_config_field(reg, field, val) \
25 do { \
26 if ((val) != -1) { \
27 (reg) &= ~AEMIF_CFG_##field(0xffffffff); \
28 (reg) |= AEMIF_CFG_##field((val)); \
29 } \
30 } while (0)
31
32void aemif_cs_configure(int cs, struct aemif_config *cfg)
33{
34 unsigned long tmp;
35
36 tmp = __raw_readl(cfg->base + AEMIF_CONFIG(cs));
37
38 set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
39 set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
40 set_config_field(tmp, WR_SETUP, cfg->wr_setup);
41 set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
42 set_config_field(tmp, WR_HOLD, cfg->wr_hold);
43 set_config_field(tmp, RD_SETUP, cfg->rd_setup);
44 set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
45 set_config_field(tmp, RD_HOLD, cfg->rd_hold);
46 set_config_field(tmp, TURN_AROUND, cfg->turn_around);
47 set_config_field(tmp, WIDTH, cfg->width);
48
49 __raw_writel(tmp, cfg->base + AEMIF_CONFIG(cs));
50}
51
52static const struct udevice_id aemif_cs_ids[] = {
53 { .compatible = "ti,da850-aemif-cs", },
54 {},
55};
56
57U_BOOT_DRIVER(ti_aemif_cs) = {
58 .name = "ti_aemif_cs",
59 .id = UCLASS_MEMORY,
60 .of_match = aemif_cs_ids,
61};