Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 1 | /* |
| 2 | * evm.c |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation version 2. |
| 9 | * |
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 11 | * kind, whether express or implied; without even the implied warranty |
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <common.h> |
Ilya Yanok | c59a6a0 | 2012-07-24 12:22:19 +0000 | [diff] [blame] | 17 | #include <errno.h> |
Chandan Nath | 9304296 | 2012-07-24 12:22:20 +0000 | [diff] [blame^] | 18 | #include <asm/io.h> |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 19 | #include <asm/arch/cpu.h> |
| 20 | #include <asm/arch/hardware.h> |
Chandan Nath | 8a8f084 | 2012-01-09 20:38:59 +0000 | [diff] [blame] | 21 | #include <asm/arch/common_def.h> |
Patil, Rachna | b4116ed | 2012-01-22 23:47:01 +0000 | [diff] [blame] | 22 | #include <i2c.h> |
Chandan Nath | 9304296 | 2012-07-24 12:22:20 +0000 | [diff] [blame^] | 23 | #include <miiphy.h> |
| 24 | #include <cpsw.h> |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 25 | |
| 26 | DECLARE_GLOBAL_DATA_PTR; |
| 27 | |
Chandan Nath | 9304296 | 2012-07-24 12:22:20 +0000 | [diff] [blame^] | 28 | #define UART_RESET (0x1 << 1) |
| 29 | #define UART_CLK_RUNNING_MASK 0x1 |
| 30 | #define UART_SMART_IDLE_EN (0x1 << 0x3) |
| 31 | |
| 32 | /* MII mode defines */ |
| 33 | #define MII_MODE_ENABLE 0x0 |
| 34 | #define RGMII_MODE_ENABLE 0xA |
| 35 | |
| 36 | struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; |
| 37 | |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 38 | /* |
Ilya Yanok | c59a6a0 | 2012-07-24 12:22:19 +0000 | [diff] [blame] | 39 | * I2C Address of on-board EEPROM |
| 40 | */ |
| 41 | #define I2C_BASE_BOARD_ADDR 0x50 |
| 42 | |
| 43 | #define NO_OF_MAC_ADDR 3 |
| 44 | #define ETH_ALEN 6 |
| 45 | |
| 46 | #define NAME_LEN 8 |
| 47 | |
| 48 | struct am335x_baseboard_id { |
| 49 | unsigned int magic; |
| 50 | char name[NAME_LEN]; |
| 51 | char version[4]; |
| 52 | char serial[12]; |
| 53 | char config[32]; |
| 54 | char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN]; |
| 55 | }; |
| 56 | |
| 57 | static struct am335x_baseboard_id header; |
| 58 | |
| 59 | static inline int board_is_bone(void) |
| 60 | { |
| 61 | return !strncmp(header.name, "A335BONE", NAME_LEN); |
| 62 | } |
| 63 | |
| 64 | /* |
| 65 | * Read header information from EEPROM into global structure. |
| 66 | */ |
| 67 | int read_eeprom(void) |
| 68 | { |
| 69 | /* Check if baseboard eeprom is available */ |
| 70 | if (i2c_probe(I2C_BASE_BOARD_ADDR)) { |
| 71 | printf("Could not probe the EEPROM; something fundamentally " |
| 72 | "wrong on the I2C bus.\n"); |
| 73 | return -ENODEV; |
| 74 | } |
| 75 | |
| 76 | /* read the eeprom using i2c */ |
| 77 | if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header, |
| 78 | sizeof(header))) { |
| 79 | printf("Could not read the EEPROM; something fundamentally" |
| 80 | " wrong on the I2C bus.\n"); |
| 81 | return -EIO; |
| 82 | } |
| 83 | |
| 84 | if (header.magic != 0xEE3355AA) { |
| 85 | /* |
| 86 | * read the eeprom using i2c again, |
| 87 | * but use only a 1 byte address |
| 88 | */ |
| 89 | if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header, |
| 90 | sizeof(header))) { |
| 91 | printf("Could not read the EEPROM; something " |
| 92 | "fundamentally wrong on the I2C bus.\n"); |
| 93 | return -EIO; |
| 94 | } |
| 95 | |
| 96 | if (header.magic != 0xEE3355AA) { |
| 97 | printf("Incorrect magic number in EEPROM\n"); |
| 98 | return -EINVAL; |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | return 0; |
| 103 | } |
| 104 | |
| 105 | /* |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 106 | * Basic board specific setup |
| 107 | */ |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 108 | int board_init(void) |
| 109 | { |
| 110 | enable_uart0_pin_mux(); |
Patil, Rachna | b4116ed | 2012-01-22 23:47:01 +0000 | [diff] [blame] | 111 | |
Patil, Rachna | b4116ed | 2012-01-22 23:47:01 +0000 | [diff] [blame] | 112 | enable_i2c0_pin_mux(); |
Steve Sakoman | d3decde | 2012-06-22 07:45:57 +0000 | [diff] [blame] | 113 | enable_i2c1_pin_mux(); |
Patil, Rachna | b4116ed | 2012-01-22 23:47:01 +0000 | [diff] [blame] | 114 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
Ilya Yanok | c59a6a0 | 2012-07-24 12:22:19 +0000 | [diff] [blame] | 115 | if (read_eeprom() < 0) |
| 116 | printf("Could not get board ID.\n"); |
Patil, Rachna | b4116ed | 2012-01-22 23:47:01 +0000 | [diff] [blame] | 117 | |
Tom Rini | 2ab2810 | 2012-05-14 12:38:18 +0000 | [diff] [blame] | 118 | gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; |
Chandan Nath | 5289e83 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 119 | |
| 120 | return 0; |
| 121 | } |
Chandan Nath | 9304296 | 2012-07-24 12:22:20 +0000 | [diff] [blame^] | 122 | |
| 123 | #ifdef CONFIG_DRIVER_TI_CPSW |
| 124 | static void cpsw_control(int enabled) |
| 125 | { |
| 126 | /* VTP can be added here */ |
| 127 | |
| 128 | return; |
| 129 | } |
| 130 | |
| 131 | static struct cpsw_slave_data cpsw_slaves[] = { |
| 132 | { |
| 133 | .slave_reg_ofs = 0x208, |
| 134 | .sliver_reg_ofs = 0xd80, |
| 135 | .phy_id = 0, |
| 136 | }, |
| 137 | { |
| 138 | .slave_reg_ofs = 0x308, |
| 139 | .sliver_reg_ofs = 0xdc0, |
| 140 | .phy_id = 1, |
| 141 | }, |
| 142 | }; |
| 143 | |
| 144 | static struct cpsw_platform_data cpsw_data = { |
| 145 | .mdio_base = AM335X_CPSW_MDIO_BASE, |
| 146 | .cpsw_base = AM335X_CPSW_BASE, |
| 147 | .mdio_div = 0xff, |
| 148 | .channels = 8, |
| 149 | .cpdma_reg_ofs = 0x800, |
| 150 | .slaves = 1, |
| 151 | .slave_data = cpsw_slaves, |
| 152 | .ale_reg_ofs = 0xd00, |
| 153 | .ale_entries = 1024, |
| 154 | .host_port_reg_ofs = 0x108, |
| 155 | .hw_stats_reg_ofs = 0x900, |
| 156 | .mac_control = (1 << 5), |
| 157 | .control = cpsw_control, |
| 158 | .host_port_num = 0, |
| 159 | .version = CPSW_CTRL_VERSION_2, |
| 160 | }; |
| 161 | |
| 162 | int board_eth_init(bd_t *bis) |
| 163 | { |
| 164 | uint8_t mac_addr[6]; |
| 165 | uint32_t mac_hi, mac_lo; |
| 166 | |
| 167 | if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { |
| 168 | debug("<ethaddr> not set. Reading from E-fuse\n"); |
| 169 | /* try reading mac address from efuse */ |
| 170 | mac_lo = readl(&cdev->macid0l); |
| 171 | mac_hi = readl(&cdev->macid0h); |
| 172 | mac_addr[0] = mac_hi & 0xFF; |
| 173 | mac_addr[1] = (mac_hi & 0xFF00) >> 8; |
| 174 | mac_addr[2] = (mac_hi & 0xFF0000) >> 16; |
| 175 | mac_addr[3] = (mac_hi & 0xFF000000) >> 24; |
| 176 | mac_addr[4] = mac_lo & 0xFF; |
| 177 | mac_addr[5] = (mac_lo & 0xFF00) >> 8; |
| 178 | |
| 179 | if (is_valid_ether_addr(mac_addr)) |
| 180 | eth_setenv_enetaddr("ethaddr", mac_addr); |
| 181 | else |
| 182 | return -1; |
| 183 | } |
| 184 | |
| 185 | if (board_is_bone()) { |
| 186 | enable_mii1_pin_mux(); |
| 187 | writel(MII_MODE_ENABLE, &cdev->miisel); |
| 188 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 189 | PHY_INTERFACE_MODE_MII; |
| 190 | } else { |
| 191 | enable_rgmii1_pin_mux(); |
| 192 | writel(RGMII_MODE_ENABLE, &cdev->miisel); |
| 193 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 194 | PHY_INTERFACE_MODE_RGMII; |
| 195 | } |
| 196 | |
| 197 | return cpsw_register(&cpsw_data); |
| 198 | } |
| 199 | #endif |