Dirk Eibach | 89b8619 | 2008-12-09 13:12:40 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de |
| 4 | * |
| 5 | * based on board/amcc/yosemite/init.S |
| 6 | * original Copyright not specified there |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <ppc_asm.tmpl> |
| 28 | #include <config.h> |
| 29 | |
| 30 | #include <asm/mmu.h> |
| 31 | |
| 32 | /************************************************************************** |
| 33 | * TLB TABLE |
| 34 | * |
| 35 | * This table is used by the cpu boot code to setup the initial tlb |
| 36 | * entries. Rather than make broad assumptions in the cpu source tree, |
| 37 | * this table lets each board set things up however they like. |
| 38 | * |
| 39 | * Pointer to the table is returned in r1 |
| 40 | * |
| 41 | *************************************************************************/ |
| 42 | |
| 43 | .section .bootpg,"ax" |
| 44 | .globl tlbtab |
| 45 | |
| 46 | tlbtab: |
| 47 | tlbtab_start |
| 48 | |
| 49 | /* |
| 50 | * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use |
| 51 | * the speed up boot process. It is patched after relocation to enable SA_I |
| 52 | */ |
| 53 | tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, |
| 54 | 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) |
| 55 | |
| 56 | /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ |
| 57 | tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, |
| 58 | 0, AC_R|AC_W|AC_X|SA_G ) |
| 59 | |
| 60 | tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, |
| 61 | 0, AC_R|AC_W|AC_X|SA_G|SA_I ) |
| 62 | tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, |
| 63 | 0, AC_R|AC_W|SA_G|SA_I ) |
| 64 | |
| 65 | /* PCI */ |
| 66 | tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, |
| 67 | 0, AC_R|AC_W|SA_G|SA_I ) |
| 68 | tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, |
| 69 | 0, AC_R|AC_W|SA_G|SA_I ) |
| 70 | tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, |
| 71 | 0, AC_R|AC_W|SA_G|SA_I ) |
| 72 | tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, |
| 73 | 0, AC_R|AC_W|SA_G|SA_I ) |
| 74 | |
| 75 | tlbtab_end |