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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * Cirrus Logic CS8900A Ethernet
3 *
wdenk6069ff22003-02-28 00:49:47 +00004 * (C) 2003 Wolfgang Denk, wd@denx.de
5 * Extension to synchronize ethaddr environment variable
6 * against value in EEPROM
7 *
wdenkc6097192002-11-03 00:24:07 +00008 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * Copyright (C) 1999 Ben Williamson <benw@pobox.com>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is loaded into SRAM in bootstrap mode, where it waits
18 * for commands on UART1 to read and write memory, jump to code etc.
19 * A design goal for this program is to be entirely independent of the
20 * target board. Anything with a CL-PS7111 or EP7211 should be able to run
21 * this code in bootstrap mode. All the board specifics can be handled on
22 * the host.
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37 */
38
39#include <common.h>
40#include <command.h>
41#include "cs8900.h"
42#include <net.h>
43
wdenka2663ea2003-12-07 18:32:37 +000044#undef DEBUG
wdenkc6097192002-11-03 00:24:07 +000045
46/* packet page register access functions */
47
48#ifdef CS8900_BUS32
49/* we don't need 16 bit initialisation on 32 bit bus */
50#define get_reg_init_bus(x) get_reg((x))
51#else
wdenk6069ff22003-02-28 00:49:47 +000052static unsigned short get_reg_init_bus (int regno)
wdenkc6097192002-11-03 00:24:07 +000053{
wdenk6069ff22003-02-28 00:49:47 +000054 /* force 16 bit busmode */
55 volatile unsigned char c;
wdenkc6097192002-11-03 00:24:07 +000056
wdenk6069ff22003-02-28 00:49:47 +000057 c = CS8900_BUS16_0;
58 c = CS8900_BUS16_1;
59 c = CS8900_BUS16_0;
60 c = CS8900_BUS16_1;
61 c = CS8900_BUS16_0;
62
63 CS8900_PPTR = regno;
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +020064 return CS8900_PDATA;
wdenkc6097192002-11-03 00:24:07 +000065}
66#endif
67
wdenk6069ff22003-02-28 00:49:47 +000068static unsigned short get_reg (int regno)
wdenkc6097192002-11-03 00:24:07 +000069{
wdenk6069ff22003-02-28 00:49:47 +000070 CS8900_PPTR = regno;
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +020071 return CS8900_PDATA;
wdenkc6097192002-11-03 00:24:07 +000072}
73
74
wdenk6069ff22003-02-28 00:49:47 +000075static void put_reg (int regno, unsigned short val)
wdenkc6097192002-11-03 00:24:07 +000076{
wdenk6069ff22003-02-28 00:49:47 +000077 CS8900_PPTR = regno;
78 CS8900_PDATA = val;
wdenkc6097192002-11-03 00:24:07 +000079}
80
wdenk6069ff22003-02-28 00:49:47 +000081static void eth_reset (void)
wdenkc6097192002-11-03 00:24:07 +000082{
wdenk6069ff22003-02-28 00:49:47 +000083 int tmo;
84 unsigned short us;
wdenkc6097192002-11-03 00:24:07 +000085
wdenk6069ff22003-02-28 00:49:47 +000086 /* reset NIC */
87 put_reg (PP_SelfCTL, get_reg (PP_SelfCTL) | PP_SelfCTL_Reset);
wdenkc6097192002-11-03 00:24:07 +000088
wdenk6069ff22003-02-28 00:49:47 +000089 /* wait for 200ms */
90 udelay (200000);
91 /* Wait until the chip is reset */
wdenkc6097192002-11-03 00:24:07 +000092
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093 tmo = get_timer (0) + 1 * CONFIG_SYS_HZ;
wdenk6069ff22003-02-28 00:49:47 +000094 while ((((us = get_reg_init_bus (PP_SelfSTAT)) & PP_SelfSTAT_InitD) == 0)
95 && tmo < get_timer (0))
96 /*NOP*/;
wdenkc6097192002-11-03 00:24:07 +000097}
98
wdenka2663ea2003-12-07 18:32:37 +000099static void eth_reginit (void)
100{
101 /* receive only error free packets addressed to this card */
102 put_reg (PP_RxCTL, PP_RxCTL_IA | PP_RxCTL_Broadcast | PP_RxCTL_RxOK);
103 /* do not generate any interrupts on receive operations */
104 put_reg (PP_RxCFG, 0);
105 /* do not generate any interrupts on transmit operations */
106 put_reg (PP_TxCFG, 0);
107 /* do not generate any interrupts on buffer operations */
108 put_reg (PP_BufCFG, 0);
109 /* enable transmitter/receiver mode */
110 put_reg (PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx);
111}
112
wdenk6069ff22003-02-28 00:49:47 +0000113void cs8900_get_enetaddr (uchar * addr)
wdenkc6097192002-11-03 00:24:07 +0000114{
wdenk6069ff22003-02-28 00:49:47 +0000115 int i;
116 unsigned char env_enetaddr[6];
117 char *tmp = getenv ("ethaddr");
118 char *end;
119
120 for (i=0; i<6; i++) {
121 env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
122 if (tmp)
123 tmp = (*end) ? end+1 : end;
wdenkc6097192002-11-03 00:24:07 +0000124 }
wdenk6069ff22003-02-28 00:49:47 +0000125
126 /* verify chip id */
127 if (get_reg_init_bus (PP_ChipID) != 0x630e)
128 return;
129 eth_reset ();
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +0200130 if ((get_reg (PP_SelfSTAT) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
wdenk6069ff22003-02-28 00:49:47 +0000131 (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
132
133 /* Load the MAC from EEPROM */
134 for (i = 0; i < 6 / 2; i++) {
135 unsigned int Addr;
136
137 Addr = get_reg (PP_IA + i * 2);
138 addr[i * 2] = Addr & 0xFF;
139 addr[i * 2 + 1] = Addr >> 8;
140 }
141
142 if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
143 memcmp(env_enetaddr, addr, 6) != 0) {
144 printf ("\nWarning: MAC addresses don't match:\n");
145 printf ("\tHW MAC address: "
146 "%02X:%02X:%02X:%02X:%02X:%02X\n",
147 addr[0], addr[1],
148 addr[2], addr[3],
149 addr[4], addr[5] );
150 printf ("\t\"ethaddr\" value: "
151 "%02X:%02X:%02X:%02X:%02X:%02X\n",
152 env_enetaddr[0], env_enetaddr[1],
153 env_enetaddr[2], env_enetaddr[3],
154 env_enetaddr[4], env_enetaddr[5]) ;
155 debug ("### Set MAC addr from environment\n");
156 memcpy (addr, env_enetaddr, 6);
157 }
158 if (!tmp) {
159 char ethaddr[20];
160 sprintf (ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
161 addr[0], addr[1],
162 addr[2], addr[3],
163 addr[4], addr[5]) ;
Jean-Christophe PLAGNIOL-VILLARD1b769882008-01-25 07:54:47 +0100164 debug ("### Set environment from HW MAC addr = \"%s\"\n", ethaddr);
wdenk6069ff22003-02-28 00:49:47 +0000165 setenv ("ethaddr", ethaddr);
166 }
wdenk6069ff22003-02-28 00:49:47 +0000167 }
wdenkc6097192002-11-03 00:24:07 +0000168}
169
wdenk6069ff22003-02-28 00:49:47 +0000170void eth_halt (void)
wdenkc6097192002-11-03 00:24:07 +0000171{
wdenk6069ff22003-02-28 00:49:47 +0000172 /* disable transmitter/receiver mode */
173 put_reg (PP_LineCTL, 0);
wdenkc6097192002-11-03 00:24:07 +0000174
wdenk6069ff22003-02-28 00:49:47 +0000175 /* "shutdown" to show ChipID or kernel wouldn't find he cs8900 ... */
176 get_reg_init_bus (PP_ChipID);
wdenkc6097192002-11-03 00:24:07 +0000177}
178
wdenk6069ff22003-02-28 00:49:47 +0000179int eth_init (bd_t * bd)
wdenkc6097192002-11-03 00:24:07 +0000180{
wdenk6069ff22003-02-28 00:49:47 +0000181 /* verify chip id */
182 if (get_reg_init_bus (PP_ChipID) != 0x630e) {
183 printf ("CS8900 Ethernet chip not found?!\n");
184 return 0;
185 }
186
187 eth_reset ();
188 /* set the ethernet address */
189 put_reg (PP_IA + 0, bd->bi_enetaddr[0] | (bd->bi_enetaddr[1] << 8));
190 put_reg (PP_IA + 2, bd->bi_enetaddr[2] | (bd->bi_enetaddr[3] << 8));
191 put_reg (PP_IA + 4, bd->bi_enetaddr[4] | (bd->bi_enetaddr[5] << 8));
192
wdenka2663ea2003-12-07 18:32:37 +0000193 eth_reginit ();
wdenkc6097192002-11-03 00:24:07 +0000194 return 0;
wdenkc6097192002-11-03 00:24:07 +0000195}
196
197/* Get a data block via Ethernet */
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +0200198int eth_rx (void)
wdenkc6097192002-11-03 00:24:07 +0000199{
wdenk6069ff22003-02-28 00:49:47 +0000200 int i;
201 unsigned short rxlen;
202 unsigned short *addr;
203 unsigned short status;
wdenkc6097192002-11-03 00:24:07 +0000204
wdenk6069ff22003-02-28 00:49:47 +0000205 status = get_reg (PP_RER);
wdenkc6097192002-11-03 00:24:07 +0000206
wdenk6069ff22003-02-28 00:49:47 +0000207 if ((status & PP_RER_RxOK) == 0)
208 return 0;
wdenkc6097192002-11-03 00:24:07 +0000209
wdenk6069ff22003-02-28 00:49:47 +0000210 status = CS8900_RTDATA; /* stat */
211 rxlen = CS8900_RTDATA; /* len */
wdenkc6097192002-11-03 00:24:07 +0000212
wdenka2663ea2003-12-07 18:32:37 +0000213#ifdef DEBUG
wdenk6069ff22003-02-28 00:49:47 +0000214 if (rxlen > PKTSIZE_ALIGN + PKTALIGN)
215 printf ("packet too big!\n");
wdenka2663ea2003-12-07 18:32:37 +0000216#endif
wdenk6069ff22003-02-28 00:49:47 +0000217 for (addr = (unsigned short *) NetRxPackets[0], i = rxlen >> 1; i > 0;
218 i--)
219 *addr++ = CS8900_RTDATA;
220 if (rxlen & 1)
221 *addr++ = CS8900_RTDATA;
wdenkc6097192002-11-03 00:24:07 +0000222
wdenk6069ff22003-02-28 00:49:47 +0000223 /* Pass the packet up to the protocol layers. */
224 NetReceive (NetRxPackets[0], rxlen);
wdenkc6097192002-11-03 00:24:07 +0000225
wdenk6069ff22003-02-28 00:49:47 +0000226 return rxlen;
wdenkc6097192002-11-03 00:24:07 +0000227}
228
229/* Send a data block via Ethernet. */
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +0200230int eth_send (volatile void *packet, int length)
wdenkc6097192002-11-03 00:24:07 +0000231{
wdenk6069ff22003-02-28 00:49:47 +0000232 volatile unsigned short *addr;
233 int tmo;
234 unsigned short s;
wdenkc6097192002-11-03 00:24:07 +0000235
236retry:
wdenk6069ff22003-02-28 00:49:47 +0000237 /* initiate a transmit sequence */
238 CS8900_TxCMD = PP_TxCmd_TxStart_Full;
239 CS8900_TxLEN = length;
wdenkc6097192002-11-03 00:24:07 +0000240
wdenk6069ff22003-02-28 00:49:47 +0000241 /* Test to see if the chip has allocated memory for the packet */
242 if ((get_reg (PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) {
243 /* Oops... this should not happen! */
wdenka2663ea2003-12-07 18:32:37 +0000244#ifdef DEBUG
wdenk6069ff22003-02-28 00:49:47 +0000245 printf ("cs: unable to send packet; retrying...\n");
wdenka2663ea2003-12-07 18:32:37 +0000246#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247 for (tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; get_timer (0) < tmo;)
wdenk6069ff22003-02-28 00:49:47 +0000248 /*NOP*/;
249 eth_reset ();
wdenka2663ea2003-12-07 18:32:37 +0000250 eth_reginit ();
wdenk6069ff22003-02-28 00:49:47 +0000251 goto retry;
252 }
wdenkc6097192002-11-03 00:24:07 +0000253
wdenk6069ff22003-02-28 00:49:47 +0000254 /* Write the contents of the packet */
255 /* assume even number of bytes */
256 for (addr = packet; length > 0; length -= 2)
257 CS8900_RTDATA = *addr++;
wdenkc6097192002-11-03 00:24:07 +0000258
wdenk6069ff22003-02-28 00:49:47 +0000259 /* wait for transfer to succeed */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260 tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
wdenk6069ff22003-02-28 00:49:47 +0000261 while ((s = get_reg (PP_TER) & ~0x1F) == 0) {
262 if (get_timer (0) >= tmo)
263 break;
264 }
wdenkc6097192002-11-03 00:24:07 +0000265
wdenk6069ff22003-02-28 00:49:47 +0000266 /* nothing */ ;
267 if ((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) {
wdenka2663ea2003-12-07 18:32:37 +0000268#ifdef DEBUG
wdenk6069ff22003-02-28 00:49:47 +0000269 printf ("\ntransmission error %#x\n", s);
wdenka2663ea2003-12-07 18:32:37 +0000270#endif
wdenk6069ff22003-02-28 00:49:47 +0000271 }
wdenkc6097192002-11-03 00:24:07 +0000272
wdenk6069ff22003-02-28 00:49:47 +0000273 return 0;
wdenkc6097192002-11-03 00:24:07 +0000274}
275
wdenk1cb8e982003-03-06 21:55:29 +0000276static void cs8900_e2prom_ready(void)
277{
Guennadi Liakhovetski13e0b8f2008-04-03 13:36:18 +0200278 while (get_reg(PP_SelfSTAT) & SI_BUSY)
279 ;
wdenk1cb8e982003-03-06 21:55:29 +0000280}
281
282/***********************************************************/
283/* read a 16-bit word out of the EEPROM */
284/***********************************************************/
285
286int cs8900_e2prom_read(unsigned char addr, unsigned short *value)
287{
288 cs8900_e2prom_ready();
289 put_reg(PP_EECMD, EEPROM_READ_CMD | addr);
290 cs8900_e2prom_ready();
291 *value = get_reg(PP_EEData);
292
293 return 0;
294}
295
296
297/***********************************************************/
298/* write a 16-bit word into the EEPROM */
299/***********************************************************/
300
wdenk06d01db2003-03-14 20:47:52 +0000301int cs8900_e2prom_write(unsigned char addr, unsigned short value)
wdenk1cb8e982003-03-06 21:55:29 +0000302{
303 cs8900_e2prom_ready();
304 put_reg(PP_EECMD, EEPROM_WRITE_EN);
305 cs8900_e2prom_ready();
306 put_reg(PP_EEData, value);
307 put_reg(PP_EECMD, EEPROM_WRITE_CMD | addr);
308 cs8900_e2prom_ready();
309 put_reg(PP_EECMD, EEPROM_WRITE_DIS);
310 cs8900_e2prom_ready();
311
wdenk06d01db2003-03-14 20:47:52 +0000312 return 0;
wdenk1cb8e982003-03-06 21:55:29 +0000313}