blob: 32d2ee4de9490d5b0e4ea308f87d222d33f815fd [file] [log] [blame]
Heiko Schocherc0dcece2013-08-19 16:39:01 +02001/*
2 * Common board functions for siemens AM335X based boards
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/board/ti/am335x/board.c
8 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#include <common.h>
14#include <errno.h>
15#include <spl.h>
16#include <asm/arch/cpu.h>
17#include <asm/arch/hardware.h>
18#include <asm/arch/omap.h>
19#include <asm/arch/ddr_defs.h>
20#include <asm/arch/clock.h>
21#include <asm/arch/gpio.h>
22#include <asm/arch/mmc_host_def.h>
23#include <asm/arch/sys_proto.h>
24#include <asm/io.h>
25#include <asm/emif.h>
26#include <asm/gpio.h>
27#include <i2c.h>
28#include <miiphy.h>
29#include <cpsw.h>
30#include <watchdog.h>
31#include "../common/factoryset.h"
32
33DECLARE_GLOBAL_DATA_PTR;
34
35#ifdef CONFIG_SPL_BUILD
36void set_uart_mux_conf(void)
37{
38 enable_uart0_pin_mux();
39}
40
41void set_mux_conf_regs(void)
42{
43 /* Initalize the board header */
44 enable_i2c0_pin_mux();
Heiko Schocher6789e842013-10-22 11:03:18 +020045 i2c_set_bus_num(0);
Heiko Schocherc0dcece2013-08-19 16:39:01 +020046 if (read_eeprom() < 0)
47 puts("Could not get board ID.\n");
48
49 enable_board_pin_mux();
50}
51
52void sdram_init(void)
53{
54 spl_siemens_board_init();
55 board_init_ddr();
56
57 return;
58}
59#endif /* #ifdef CONFIG_SPL_BUILD */
60
61#ifndef CONFIG_SPL_BUILD
62/*
63 * Basic board specific setup. Pinmux has been handled already.
64 */
65int board_init(void)
66{
67#if defined(CONFIG_HW_WATCHDOG)
68 hw_watchdog_init();
69#endif /* defined(CONFIG_HW_WATCHDOG) */
Heiko Schocher6789e842013-10-22 11:03:18 +020070 i2c_set_bus_num(0);
Heiko Schocherc0dcece2013-08-19 16:39:01 +020071 if (read_eeprom() < 0)
72 puts("Could not get board ID.\n");
73
74 gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
75 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
76
77#ifdef CONFIG_FACTORYSET
78 factoryset_read_eeprom(CONFIG_SYS_I2C_EEPROM_ADDR);
79#endif
80 gpmc_init();
81
82#ifdef CONFIG_VIDEO
83 board_video_init();
84#endif
85
86 return 0;
87}
88#endif /* #ifndef CONFIG_SPL_BUILD */
89
90#define OSC (V_OSCK/1000000)
91const struct dpll_params dpll_ddr = {
92 DDR_PLL_FREQ, OSC-1, 1, -1, -1, -1, -1};
93
94const struct dpll_params *get_dpll_ddr_params(void)
95{
96 return &dpll_ddr;
97}
98
99#ifdef CONFIG_BOARD_LATE_INIT
100int board_late_init(void)
101{
102 omap_nand_switch_ecc(1, 8);
103
104 return 0;
105}
106#endif
107
108#ifndef CONFIG_SPL_BUILD
109#if defined(BOARD_DFU_BUTTON_GPIO)
110/*
111 * This command returns the status of the user button on
112 * Input - none
113 * Returns - 1 if button is held down
114 * 0 if button is not held down
115 */
116static int
117do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
118{
119 int button = 0;
120 int gpio;
121
122 gpio = BOARD_DFU_BUTTON_GPIO;
123 gpio_request(gpio, "DFU");
124 gpio_direction_input(gpio);
125 if (gpio_get_value(gpio))
126 button = 1;
127 else
128 button = 0;
129
130 gpio_free(gpio);
131 if (!button) {
132 /* LED0 - RED=1: GPIO2_0 2*32 = 64 */
133 gpio_request(BOARD_DFU_BUTTON_LED, "");
134 gpio_direction_output(BOARD_DFU_BUTTON_LED, 1);
135 gpio_set_value(BOARD_DFU_BUTTON_LED, 1);
136 }
137
138 return button;
139}
140
141U_BOOT_CMD(
142 dfubutton, CONFIG_SYS_MAXARGS, 1, do_userbutton,
143 "Return the status of the DFU button",
144 ""
145);
146#endif
147
148static int
149do_usertestwdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
150{
151 printf("\n\n\n Go into infinite loop\n\n\n");
152 while (1)
153 ;
154 return 0;
155};
156
157U_BOOT_CMD(
158 testwdt, CONFIG_SYS_MAXARGS, 1, do_usertestwdt,
159 "Sends U-Boot into infinite loop",
160 ""
161);
162
163#ifndef CONFIG_SYS_DCACHE_OFF
164void enable_caches(void)
165{
166 printf("Enable d-cache\n");
167 /* Enable D-cache. I-cache is already enabled in start.S */
168 dcache_enable();
169}
170#endif /* CONFIG_SYS_DCACHE_OFF */
171#endif /* !CONFIG_SPL_BUILD */