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wdenkd1cbe852003-06-28 17:24:46 +00001/*
wdenkc837dcb2004-01-20 23:12:12 +00002 * (C) Copyright 2000-2004
wdenkd1cbe852003-06-28 17:24:46 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 * (easy to change)
34 */
35
36#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
37#define CONFIG_4xx 1 /* ...member of PPC4xx family */
38#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
39
wdenkc837dcb2004-01-20 23:12:12 +000040#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
wdenkd1cbe852003-06-28 17:24:46 +000041
42#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
43
44/* I2C configuration */
45#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
46#define CFG_I2C_SPEED 40000 /* I2C speed */
47#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
48
49/* environment is in EEPROM */
50#define CFG_ENV_IS_IN_EEPROM 1
51#undef CFG_ENV_IS_IN_FLASH
52#undef CFG_ENV_IS_IN_NVRAM
53
54#ifdef CFG_ENV_IS_IN_EEPROM
55#define CFG_I2C_EEPROM_ADDR 0x56 /* 1010110 */
56#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
57#define CFG_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
58#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
59#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
60#define CFG_ENV_OFFSET 4 /* Offset of Environment Sector */
61#define CFG_ENV_SIZE 350 /* that is 350 bytes only! */
62#endif
63
64#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
65/* Explanation:
66 autbooting is altogether disabled and cannot be
67 enabled if CONFIG_BOOTDELAY is negative.
wdenk945af8d2003-07-16 21:53:01 +000068 If you want shorter bootdelay, then
wdenkd1cbe852003-06-28 17:24:46 +000069 - "setenv bootdelay <delay>" to the proper value
70*/
71
72#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
73
74#define CONFIG_BOOTARGS "root=/dev/ram " \
75 "ramdisk_size=32768 " \
76 "console=ttyS0,115200 " \
77 "ram=128M debug"
78
79#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
80#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
81
82#define CONFIG_MII 1 /* MII PHY management */
83#define CONFIG_PHY_ADDR 0 /* PHY address */
84
85#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
86
87/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
88#include <cmd_confdefs.h>
89
90#undef CONFIG_WATCHDOG /* watchdog disabled */
91
92/*
93 * Miscellaneous configurable options
94 */
95#define CFG_LONGHELP /* undef to save memory */
96#define CFG_PROMPT "=> " /* Monitor Command Prompt */
97#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
98#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
99#else
100#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
101#endif
102#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
103#define CFG_MAXARGS 16 /* max number of command args */
104#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
105
106#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
107#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
108
109/* UART configuration */
110#define CFG_BASE_BAUD 691200
111
112/* Default baud rate */
113#define CONFIG_BAUDRATE 115200
wdenk945af8d2003-07-16 21:53:01 +0000114
wdenkd1cbe852003-06-28 17:24:46 +0000115/* The following table includes the supported baudrates */
116#define CFG_BAUDRATE_TABLE \
wdenk945af8d2003-07-16 21:53:01 +0000117 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
118 57600, 115200, 230400, 460800, 921600 }
wdenkd1cbe852003-06-28 17:24:46 +0000119
120#define CFG_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
121
122#define CFG_LOAD_ADDR 0x100000 /* default load address */
123#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
124
125#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
126
127/*-----------------------------------------------------------------------
128 * PCI stuff
129 *-----------------------------------------------------------------------
130 */
131#undef CONFIG_PCI /* no pci support */
132
133/*-----------------------------------------------------------------------
134 * External peripheral base address
135 *-----------------------------------------------------------------------
136 */
137#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
138#undef CONFIG_IDE_LED /* no led for ide supported */
139#undef CONFIG_IDE_RESET /* no reset for ide supported */
140
141#define CFG_KEY_REG_BASE_ADDR 0xF0100000
142#define CFG_IR_REG_BASE_ADDR 0xF0200000
143#define CFG_FPGA_REG_BASE_ADDR 0xF0300000
144
145/*-----------------------------------------------------------------------
146 * Start addresses for the final memory configuration
147 * (Set up by the startup code)
148 * Please note that CFG_SDRAM_BASE _must_ start at 0
149 */
150#define CFG_SDRAM_BASE 0x00000000
151#define CFG_FLASH0_BASE 0xFFF80000
152#define CFG_FLASH0_SIZE 0x00080000
153#define CFG_FLASH1_BASE 0x20000000
154#define CFG_FLASH1_SIZE 0x02000000
155#define CFG_FLASH_BASE CFG_FLASH0_BASE
156#define CFG_FLASH_SIZE CFG_FLASH0_SIZE
157#define CFG_MONITOR_BASE TEXT_BASE
158#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
159#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
160
161#if CFG_MONITOR_BASE < CFG_FLASH0_BASE
162#define CFG_RAMSTART
163#endif
164
165/*
166 * For booting Linux, the board info and command line data
167 * have to be in the first 8 MB of memory, since this is
168 * the maximum mapped by the Linux kernel during initialization.
169 */
170#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
171/*-----------------------------------------------------------------------
172 * FLASH organization
173 */
174#define CFG_MAX_FLASH_BANKS 5 /* max number of memory banks */
175#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
176
177#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
178#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
179
wdenk945af8d2003-07-16 21:53:01 +0000180#ifdef CFG_ENV_IS_IN_FLASH
wdenkd1cbe852003-06-28 17:24:46 +0000181#define CFG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
182#define CFG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
183#define CFG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
184#endif
185
186/* On Chip Memory location/size */
187#define CFG_OCM_DATA_ADDR 0xF8000000
188#define CFG_OCM_DATA_SIZE 0x1000
189
190/* Global info and initial stack */
191#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of on-chip SRAM */
192#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
193#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
194#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
195#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
196
197/* Cache configuration */
198#define CFG_DCACHE_SIZE 8192
199#define CFG_CACHELINE_SIZE 32
200
201/*
202 * Internal Definitions
203 *
204 * Boot Flags
205 */
206#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
207#define BOOTFLAG_WARM 0x02 /* Software reboot */
208
209#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
210#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
211#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
212#endif
213#endif /* __CONFIG_H */