Vitaly Andrianov | ef509b9 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 1 | /* |
| 2 | * keystone2: common clock header file |
| 3 | * |
| 4 | * (C) Copyright 2012-2014 |
| 5 | * Texas Instruments Incorporated, <www.ti.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __ASM_ARCH_CLOCK_H |
| 11 | #define __ASM_ARCH_CLOCK_H |
| 12 | |
Khoronzhuk, Ivan | 8dfc15f | 2014-07-09 23:44:47 +0300 | [diff] [blame^] | 13 | #ifndef __ASSEMBLY__ |
| 14 | |
Vitaly Andrianov | ef509b9 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 15 | #ifdef CONFIG_SOC_K2HK |
| 16 | #include <asm/arch/clock-k2hk.h> |
| 17 | #endif |
| 18 | |
Khoronzhuk, Ivan | 8dfc15f | 2014-07-09 23:44:47 +0300 | [diff] [blame^] | 19 | #define MAIN_PLL CORE_PLL |
| 20 | |
| 21 | #include <asm/types.h> |
| 22 | |
| 23 | struct keystone_pll_regs { |
| 24 | u32 reg0; |
| 25 | u32 reg1; |
| 26 | }; |
| 27 | |
| 28 | /* PLL configuration data */ |
| 29 | struct pll_init_data { |
| 30 | int pll; |
| 31 | int pll_m; /* PLL Multiplier */ |
| 32 | int pll_d; /* PLL divider */ |
| 33 | int pll_od; /* PLL output divider */ |
| 34 | }; |
| 35 | |
| 36 | extern const struct keystone_pll_regs keystone_pll_regs[]; |
| 37 | |
| 38 | void init_plls(int num_pll, struct pll_init_data *config); |
| 39 | void init_pll(const struct pll_init_data *data); |
| 40 | unsigned long clk_get_rate(unsigned int clk); |
| 41 | unsigned long clk_round_rate(unsigned int clk, unsigned long hz); |
| 42 | int clk_set_rate(unsigned int clk, unsigned long hz); |
| 43 | |
| 44 | #endif |
Vitaly Andrianov | ef509b9 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 45 | #endif |