| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_MVEBU=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x00000000 |
| 4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 5 | CONFIG_TARGET_TURRIS_MOX=y |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 6 | CONFIG_DEBUG_UART_BASE=0xd0012000 |
| 7 | CONFIG_DEBUG_UART_CLOCK=25804800 |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 8 | CONFIG_DEBUG_UART=y |
| 9 | CONFIG_DISTRO_DEFAULTS=y |
| Tom Rini | 86cf1c8 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 10 | CONFIG_NR_DRAM_BANKS=1 |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 11 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 12 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| 13 | # CONFIG_DISPLAY_CPUINFO is not set |
| 14 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 15 | CONFIG_ARCH_EARLY_INIT_R=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 16 | CONFIG_CMD_CLK=y |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 17 | # CONFIG_CMD_FLASH is not set |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 18 | CONFIG_CMD_I2C=y |
| 19 | CONFIG_CMD_MMC=y |
| 20 | CONFIG_CMD_SF=y |
| 21 | CONFIG_CMD_SPI=y |
| 22 | CONFIG_CMD_USB=y |
| 23 | # CONFIG_CMD_SETEXPR is not set |
| 24 | CONFIG_CMD_TFTPPUT=y |
| 25 | CONFIG_CMD_CACHE=y |
| 26 | CONFIG_CMD_TIME=y |
| 27 | CONFIG_CMD_MVEBU_BUBT=y |
| 28 | CONFIG_CMD_BTRFS=y |
| 29 | CONFIG_CMD_EXT4_WRITE=y |
| 30 | CONFIG_MAC_PARTITION=y |
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame^] | 31 | CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 32 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 33 | CONFIG_CLK=y |
| 34 | CONFIG_CLK_MVEBU=y |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 35 | CONFIG_DM_GPIO=y |
| 36 | # CONFIG_MVEBU_GPIO is not set |
| 37 | CONFIG_DM_I2C=y |
| 38 | CONFIG_MISC=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 39 | CONFIG_DM_MMC=y |
| 40 | CONFIG_MMC_SDHCI=y |
| 41 | CONFIG_MMC_SDHCI_SDMA=y |
| 42 | CONFIG_MMC_SDHCI_XENON=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 43 | CONFIG_SPI_FLASH=y |
| 44 | CONFIG_SPI_FLASH_MACRONIX=y |
| 45 | CONFIG_SPI_FLASH_SPANSION=y |
| 46 | CONFIG_SPI_FLASH_STMICRO=y |
| 47 | CONFIG_SPI_FLASH_WINBOND=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 48 | CONFIG_PHY_GIGE=y |
| 49 | CONFIG_MVNETA=y |
| 50 | CONFIG_MVEBU_COMPHY_SUPPORT=y |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 51 | CONFIG_PINCTRL=y |
| 52 | CONFIG_PINCTRL_ARMADA_37XX=y |
| 53 | CONFIG_DM_REGULATOR_FIXED=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 54 | # CONFIG_SPL_SERIAL_PRESENT is not set |
| 55 | CONFIG_DEBUG_MVEBU_A3700_UART=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 56 | CONFIG_DEBUG_UART_SHIFT=2 |
| 57 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 58 | CONFIG_MVEBU_A3700_UART=y |
| 59 | CONFIG_MVEBU_A3700_SPI=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 60 | CONFIG_USB=y |
| 61 | CONFIG_DM_USB=y |
| 62 | CONFIG_USB_XHCI_HCD=y |
| 63 | CONFIG_USB_EHCI_HCD=y |
| 64 | CONFIG_USB_STORAGE=y |
| 65 | CONFIG_USB_HOST_ETHER=y |
| 66 | CONFIG_USB_ETHER_ASIX=y |
| 67 | CONFIG_USB_ETHER_MCS7830=y |
| 68 | CONFIG_USB_ETHER_RTL8152=y |
| 69 | CONFIG_USB_ETHER_SMSC95XX=y |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 70 | CONFIG_WDT=y |
| 71 | CONFIG_WDT_ARMADA_37XX=y |
| Marek Behún | 80af1a9 | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 72 | CONFIG_SHA1=y |
| 73 | CONFIG_SHA256=y |