blob: 391d0671584c0f24fa7c3e160e77c33aa63b0d1e [file] [log] [blame]
Alexey Brodkinfb2dea62015-11-10 19:16:25 +03001/*
2 * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6/dts-v1/;
7
8#include "skeleton.dtsi"
9
10/ {
11 #address-cells = <1>;
12 #size-cells = <1>;
13
14 aliases {
15 console = &uart0;
16 };
17
18 clocks {
19 apbclk: apbclk {
20 compatible = "fixed-clock";
21 clock-frequency = <50000000>;
22 #clock-cells = <0>;
23 };
24 };
25
26 uart0: serial0@e0022000 {
27 compatible = "snps,dw-apb-uart";
28 reg = <0xe0022000 0x1000>;
29 reg-shift = <2>;
30 reg-io-width = <4>;
31 };
32
33 ethernet@e0018000 {
34 #interrupt-cells = <1>;
35 compatible = "altr,socfpga-stmmac";
36 reg = < 0xe0018000 0x2000 >;
37 interrupts = < 25 >;
38 interrupt-names = "macirq";
39 phy-mode = "gmii";
40 snps,pbl = < 32 >;
41 clocks = <&apbclk>;
42 clock-names = "stmmaceth";
43 max-speed = <100>;
44 };
Alexey Brodkin8555dd82015-11-30 20:53:25 +030045
46 ehci@0xe0040000 {
47 compatible = "generic-ehci";
48 reg = < 0xe0040000 0x100 >;
49 interrupts = < 8 >;
50 };
Alexey Brodkind0602bd2015-12-10 16:56:42 +030051
52 ohci@0xe0060000 {
53 compatible = "generic-ohci";
54 reg = < 0xe0060000 0x100 >;
55 interrupts = < 8 >;
56 };
Alexey Brodkinfb2dea62015-11-10 19:16:25 +030057};