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wdenkea8015b2002-10-26 16:43:06 +00001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29
30#define FLASH_BANK_SIZE 0x400000
31#define MAIN_SECT_SIZE 0x20000
32
33flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
34
35
36/*-----------------------------------------------------------------------
37 */
38
39ulong flash_init(void)
40{
41 int i, j;
42 ulong size = 0;
43
44 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
45 {
46 ulong flashbase = 0;
47 flash_info[i].flash_id =
wdenk8bde7f72003-06-27 21:31:46 +000048 (INTEL_MANUFACT & FLASH_VENDMASK) |
49 (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
wdenkea8015b2002-10-26 16:43:06 +000050 flash_info[i].size = FLASH_BANK_SIZE;
51 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
52 memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
53 switch (i)
54 {
wdenk8bde7f72003-06-27 21:31:46 +000055 case 0:
56 flashbase = PHYS_FLASH_1;
57 break;
58 case 1:
59 flashbase = PHYS_FLASH_2;
60 break;
61 default:
62 panic("configured to many flash banks!\n");
63 break;
wdenkea8015b2002-10-26 16:43:06 +000064 }
65 for (j = 0; j < flash_info[i].sector_count; j++)
66 {
wdenk8bde7f72003-06-27 21:31:46 +000067 flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
wdenkea8015b2002-10-26 16:43:06 +000068 }
69 size += flash_info[i].size;
70 }
71
72 /* Protect monitor and environment sectors
73 */
74 flash_protect(FLAG_PROTECT_SET,
wdenk8bde7f72003-06-27 21:31:46 +000075 CFG_FLASH_BASE,
76 CFG_FLASH_BASE + monitor_flash_len - 1,
77 &flash_info[0]);
wdenkea8015b2002-10-26 16:43:06 +000078
79 flash_protect(FLAG_PROTECT_SET,
wdenk8bde7f72003-06-27 21:31:46 +000080 CFG_ENV_ADDR,
81 CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
82 &flash_info[0]);
wdenkea8015b2002-10-26 16:43:06 +000083
84 return size;
85}
86
87/*-----------------------------------------------------------------------
88 */
89void flash_print_info (flash_info_t *info)
90{
91 int i, j;
92
93 for (j=0; j<CFG_MAX_FLASH_BANKS; j++)
94 {
95 switch (info->flash_id & FLASH_VENDMASK)
96 {
wdenk8bde7f72003-06-27 21:31:46 +000097 case (INTEL_MANUFACT & FLASH_VENDMASK):
98 printf("Intel: ");
99 break;
100 default:
101 printf("Unknown Vendor ");
102 break;
wdenkea8015b2002-10-26 16:43:06 +0000103 }
104
105 switch (info->flash_id & FLASH_TYPEMASK)
106 {
wdenk8bde7f72003-06-27 21:31:46 +0000107 case (INTEL_ID_28F320J3A & FLASH_TYPEMASK):
108 printf("28F320J3A (32Mbit)\n");
109 break;
110 case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
111 printf("28F128J3 (128Mbit)\n");
112 break;
113 default:
114 printf("Unknown Chip Type\n");
115 goto Done;
116 break;
wdenkea8015b2002-10-26 16:43:06 +0000117 }
118
119 printf(" Size: %ld MB in %d Sectors\n",
wdenk8bde7f72003-06-27 21:31:46 +0000120 info->size >> 20, info->sector_count);
wdenkea8015b2002-10-26 16:43:06 +0000121
122 printf(" Sector Start Addresses:");
123 for (i = 0; i < info->sector_count; i++)
124 {
wdenk8bde7f72003-06-27 21:31:46 +0000125 if ((i % 5) == 0)
126 {
127 printf ("\n ");
128 }
129 printf (" %08lX%s", info->start[i],
130 info->protect[i] ? " (RO)" : " ");
wdenkea8015b2002-10-26 16:43:06 +0000131 }
132 printf ("\n");
133 info++;
134 }
135
136Done:
137}
138
139/*-----------------------------------------------------------------------
140 */
141
142int flash_erase (flash_info_t *info, int s_first, int s_last)
143{
144 int flag, prot, sect;
145 int rc = ERR_OK;
146
147 if (info->flash_id == FLASH_UNKNOWN)
wdenk8bde7f72003-06-27 21:31:46 +0000148 return ERR_UNKNOWN_FLASH_TYPE;
wdenkea8015b2002-10-26 16:43:06 +0000149
150 if ((s_first < 0) || (s_first > s_last)) {
wdenk8bde7f72003-06-27 21:31:46 +0000151 return ERR_INVAL;
wdenkea8015b2002-10-26 16:43:06 +0000152 }
153
154 if ((info->flash_id & FLASH_VENDMASK) !=
wdenk8bde7f72003-06-27 21:31:46 +0000155 (INTEL_MANUFACT & FLASH_VENDMASK)) {
156 return ERR_UNKNOWN_FLASH_VENDOR;
wdenkea8015b2002-10-26 16:43:06 +0000157 }
158
159 prot = 0;
160 for (sect=s_first; sect<=s_last; ++sect) {
161 if (info->protect[sect]) {
wdenk8bde7f72003-06-27 21:31:46 +0000162 prot++;
wdenkea8015b2002-10-26 16:43:06 +0000163 }
164 }
165 if (prot)
wdenk8bde7f72003-06-27 21:31:46 +0000166 return ERR_PROTECTED;
wdenkea8015b2002-10-26 16:43:06 +0000167
168 /*
169 * Disable interrupts which might cause a timeout
170 * here. Remember that our exception vectors are
171 * at address 0 in the flash, and we don't want a
172 * (ticker) exception to happen while the flash
173 * chip is in programming mode.
174 */
175 flag = disable_interrupts();
176
177 /* Start erase on unprotected sectors */
178 for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
179
180 printf("Erasing sector %2d ... ", sect);
181
182 /* arm simple, non interrupt dependent timer */
183 reset_timer_masked();
184
185 if (info->protect[sect] == 0) { /* not protected */
wdenk8bde7f72003-06-27 21:31:46 +0000186 vu_short *addr = (vu_short *)(info->start[sect]);
wdenkea8015b2002-10-26 16:43:06 +0000187
wdenk8bde7f72003-06-27 21:31:46 +0000188 *addr = 0x20; /* erase setup */
189 *addr = 0xD0; /* erase confirm */
wdenkea8015b2002-10-26 16:43:06 +0000190
wdenk8bde7f72003-06-27 21:31:46 +0000191 while ((*addr & 0x80) != 0x80) {
192 if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
193 *addr = 0xB0; /* suspend erase */
194 *addr = 0xFF; /* reset to read mode */
195 rc = ERR_TIMOUT;
196 goto outahere;
197 }
198 }
wdenkea8015b2002-10-26 16:43:06 +0000199
wdenk8bde7f72003-06-27 21:31:46 +0000200 /* clear status register command */
201 *addr = 0x50;
202 /* reset to read mode */
203 *addr = 0xFF;
wdenkea8015b2002-10-26 16:43:06 +0000204 }
205 printf("ok.\n");
206 }
207 if (ctrlc())
208 printf("User Interrupt!\n");
209
210outahere:
211
212 /* allow flash to settle - wait 10 ms */
213 udelay_masked(10000);
214
215 if (flag)
216 enable_interrupts();
217
218 return rc;
219}
220
221/*-----------------------------------------------------------------------
222 * Copy memory to flash
223 */
224
225static int write_word (flash_info_t *info, ulong dest, ushort data)
226{
227 vu_short *addr = (vu_short *)dest, val;
228 int rc = ERR_OK;
229 int flag;
230
231 /* Check if Flash is (sufficiently) erased
232 */
233 if ((*addr & data) != data)
234 return ERR_NOT_ERASED;
235
236 /*
237 * Disable interrupts which might cause a timeout
238 * here. Remember that our exception vectors are
239 * at address 0 in the flash, and we don't want a
240 * (ticker) exception to happen while the flash
241 * chip is in programming mode.
242 */
243 flag = disable_interrupts();
244
245 /* clear status register command */
246 *addr = 0x50;
247
248 /* program set-up command */
249 *addr = 0x40;
250
251 /* latch address/data */
252 *addr = data;
253
254 /* arm simple, non interrupt dependent timer */
255 reset_timer_masked();
256
257 /* wait while polling the status register */
258 while(((val = *addr) & 0x80) != 0x80)
259 {
260 if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
wdenk8bde7f72003-06-27 21:31:46 +0000261 rc = ERR_TIMOUT;
262 /* suspend program command */
263 *addr = 0xB0;
264 goto outahere;
wdenkea8015b2002-10-26 16:43:06 +0000265 }
266 }
267
268 if(val & 0x1A) { /* check for error */
269 printf("\nFlash write error %02x at address %08lx\n",
wdenk8bde7f72003-06-27 21:31:46 +0000270 (int)val, (unsigned long)dest);
wdenkea8015b2002-10-26 16:43:06 +0000271 if(val & (1<<3)) {
wdenk8bde7f72003-06-27 21:31:46 +0000272 printf("Voltage range error.\n");
273 rc = ERR_PROG_ERROR;
274 goto outahere;
wdenkea8015b2002-10-26 16:43:06 +0000275 }
276 if(val & (1<<1)) {
wdenk8bde7f72003-06-27 21:31:46 +0000277 printf("Device protect error.\n");
278 rc = ERR_PROTECTED;
279 goto outahere;
wdenkea8015b2002-10-26 16:43:06 +0000280 }
281 if(val & (1<<4)) {
wdenk8bde7f72003-06-27 21:31:46 +0000282 printf("Programming error.\n");
283 rc = ERR_PROG_ERROR;
284 goto outahere;
wdenkea8015b2002-10-26 16:43:06 +0000285 }
286 rc = ERR_PROG_ERROR;
287 goto outahere;
288 }
289
290outahere:
291 /* read array command */
292 *addr = 0xFF;
293
294 if (flag)
295 enable_interrupts();
296
297 return rc;
298}
299
300/*-----------------------------------------------------------------------
301 * Copy memory to flash.
302 */
303
304int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
305{
306 ulong cp, wp;
307 ushort data;
308 int l;
309 int i, rc;
310
311 wp = (addr & ~1); /* get lower word aligned address */
312
313 /*
314 * handle unaligned start bytes
315 */
316 if ((l = addr - wp) != 0)
317 {
318 data = 0;
319 for (i=0, cp=wp; i<l; ++i, ++cp) {
wdenk8bde7f72003-06-27 21:31:46 +0000320 data = (data >> 8) | (*(uchar *)cp << 8);
wdenkea8015b2002-10-26 16:43:06 +0000321 }
322 for (; i<2 && cnt>0; ++i) {
wdenk8bde7f72003-06-27 21:31:46 +0000323 data = (data >> 8) | (*src++ << 8);
324 --cnt;
325 ++cp;
wdenkea8015b2002-10-26 16:43:06 +0000326 }
327 for (; cnt==0 && i<2; ++i, ++cp) {
wdenk8bde7f72003-06-27 21:31:46 +0000328 data = (data >> 8) | (*(uchar *)cp << 8);
wdenkea8015b2002-10-26 16:43:06 +0000329 }
330
331 if ((rc = write_word(info, wp, data)) != 0) {
wdenk8bde7f72003-06-27 21:31:46 +0000332 return (rc);
wdenkea8015b2002-10-26 16:43:06 +0000333 }
334 wp += 2;
335 }
336
337 /*
338 * handle word aligned part
339 */
340 while (cnt >= 2) {
341 data = *((vu_short*)src);
342 if ((rc = write_word(info, wp, data)) != 0) {
wdenk8bde7f72003-06-27 21:31:46 +0000343 return (rc);
wdenkea8015b2002-10-26 16:43:06 +0000344 }
345 src += 2;
346 wp += 2;
347 cnt -= 2;
348 }
349
350 if (cnt == 0) {
351 return ERR_OK;
352 }
353
354 /*
355 * handle unaligned tail bytes
356 */
357 data = 0;
358 for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
359 data = (data >> 8) | (*src++ << 8);
360 --cnt;
361 }
362 for (; i<2; ++i, ++cp) {
363 data = (data >> 8) | (*(uchar *)cp << 8);
364 }
365
366 return write_word(info, wp, data);
367}