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wdenk4a9cbbe2002-08-27 09:48:53 +00001/*
2 * (C) Copyright 2000, 2001
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * FPGA support
27 */
28#include <common.h>
29#include <command.h>
wdenk4a9cbbe2002-08-27 09:48:53 +000030#if (CONFIG_COMMANDS & CFG_CMD_NET)
31#include <net.h>
32#endif
wdenk8bde7f72003-06-27 21:31:46 +000033#include <fpga.h>
wdenkc3d2b4b2005-01-22 18:13:04 +000034#include <malloc.h>
wdenk4a9cbbe2002-08-27 09:48:53 +000035
36#if 0
37#define FPGA_DEBUG
38#endif
39
40#ifdef FPGA_DEBUG
41#define PRINTF(fmt,args...) printf (fmt ,##args)
42#else
43#define PRINTF(fmt,args...)
44#endif
45
46#if defined (CONFIG_FPGA) && ( CONFIG_COMMANDS & CFG_CMD_FPGA )
47
48/* Local functions */
wdenkd4ca31c2004-01-02 14:00:00 +000049static void fpga_usage (cmd_tbl_t * cmdtp);
50static int fpga_get_op (char *opstr);
wdenk4a9cbbe2002-08-27 09:48:53 +000051
52/* Local defines */
53#define FPGA_NONE -1
54#define FPGA_INFO 0
55#define FPGA_LOAD 1
wdenk30ce5ab2005-01-09 18:12:51 +000056#define FPGA_LOADB 2
wdenk4a9cbbe2002-08-27 09:48:53 +000057#define FPGA_DUMP 3
58
wdenk30ce5ab2005-01-09 18:12:51 +000059/* Convert bitstream data and load into the fpga */
60int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
61{
Wolfgang Denk8b019da2005-08-08 00:14:41 +020062 unsigned int length;
63 unsigned char* swapdata;
64 unsigned int swapsize;
wdenk30ce5ab2005-01-09 18:12:51 +000065 char buffer[80];
Wolfgang Denk8b019da2005-08-08 00:14:41 +020066 unsigned char *ptr;
67 unsigned char *dataptr;
68 unsigned char data;
69 unsigned int i;
wdenk30ce5ab2005-01-09 18:12:51 +000070 int rc;
71
72 dataptr = fpgadata;
73
74#if CFG_FPGA_XILINX
Wolfgang Denk8b019da2005-08-08 00:14:41 +020075 /* skip the first bytes of the bitsteam, their meaning is unknown */
76 length = (*dataptr << 8) + *(dataptr+1);
77 dataptr+=2;
78 dataptr+=length;
wdenk30ce5ab2005-01-09 18:12:51 +000079
80 /* get design name (identifier, length, string) */
Wolfgang Denk8b019da2005-08-08 00:14:41 +020081 length = (*dataptr << 8) + *(dataptr+1);
82 dataptr+=2;
wdenk30ce5ab2005-01-09 18:12:51 +000083 if (*dataptr++ != 0x61) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +020084 PRINTF ("%s: Design name identifier not recognized in bitstream\n",
85 __FUNCTION__ );
wdenk30ce5ab2005-01-09 18:12:51 +000086 return FPGA_FAIL;
87 }
88
wdenka562e1b2005-01-09 18:21:42 +000089 length = (*dataptr << 8) + *(dataptr+1);
wdenk30ce5ab2005-01-09 18:12:51 +000090 dataptr+=2;
91 for(i=0;i<length;i++)
92 buffer[i]=*dataptr++;
wdenka562e1b2005-01-09 18:21:42 +000093
Wolfgang Denk8b019da2005-08-08 00:14:41 +020094 printf(" design filename = \"%s\"\n", buffer);
wdenk30ce5ab2005-01-09 18:12:51 +000095
96 /* get part number (identifier, length, string) */
97 if (*dataptr++ != 0x62) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +020098 printf("%s: Part number identifier not recognized in bitstream\n",
99 __FUNCTION__ );
wdenk30ce5ab2005-01-09 18:12:51 +0000100 return FPGA_FAIL;
101 }
wdenka562e1b2005-01-09 18:21:42 +0000102
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200103 length = (*dataptr << 8) + *(dataptr+1);
104 dataptr+=2;
wdenka562e1b2005-01-09 18:21:42 +0000105 for(i=0;i<length;i++)
wdenk30ce5ab2005-01-09 18:12:51 +0000106 buffer[i]=*dataptr++;
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200107 printf(" part number = \"%s\"\n", buffer);
wdenka562e1b2005-01-09 18:21:42 +0000108
wdenk30ce5ab2005-01-09 18:12:51 +0000109 /* get date (identifier, length, string) */
110 if (*dataptr++ != 0x63) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200111 printf("%s: Date identifier not recognized in bitstream\n",
112 __FUNCTION__);
wdenk30ce5ab2005-01-09 18:12:51 +0000113 return FPGA_FAIL;
114 }
wdenka562e1b2005-01-09 18:21:42 +0000115
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200116 length = (*dataptr << 8) + *(dataptr+1);
117 dataptr+=2;
wdenk30ce5ab2005-01-09 18:12:51 +0000118 for(i=0;i<length;i++)
119 buffer[i]=*dataptr++;
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200120 printf(" date = \"%s\"\n", buffer);
wdenk30ce5ab2005-01-09 18:12:51 +0000121
122 /* get time (identifier, length, string) */
123 if (*dataptr++ != 0x64) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200124 printf("%s: Time identifier not recognized in bitstream\n",__FUNCTION__);
wdenk30ce5ab2005-01-09 18:12:51 +0000125 return FPGA_FAIL;
126 }
wdenka562e1b2005-01-09 18:21:42 +0000127
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200128 length = (*dataptr << 8) + *(dataptr+1);
129 dataptr+=2;
wdenk30ce5ab2005-01-09 18:12:51 +0000130 for(i=0;i<length;i++)
131 buffer[i]=*dataptr++;
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200132 printf(" time = \"%s\"\n", buffer);
wdenka562e1b2005-01-09 18:21:42 +0000133
wdenk30ce5ab2005-01-09 18:12:51 +0000134 /* get fpga data length (identifier, length) */
135 if (*dataptr++ != 0x65) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200136 printf("%s: Data length identifier not recognized in bitstream\n",
137 __FUNCTION__);
wdenk30ce5ab2005-01-09 18:12:51 +0000138 return FPGA_FAIL;
139 }
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200140 swapsize = ((unsigned int) *dataptr <<24) +
141 ((unsigned int) *(dataptr+1) <<16) +
142 ((unsigned int) *(dataptr+2) <<8 ) +
143 ((unsigned int) *(dataptr+3) ) ;
wdenk30ce5ab2005-01-09 18:12:51 +0000144 dataptr+=4;
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200145 printf(" bytes in bitstream = %d\n", swapsize);
wdenka562e1b2005-01-09 18:21:42 +0000146
wdenk30ce5ab2005-01-09 18:12:51 +0000147 /* check consistency of length obtained */
148 if (swapsize >= size) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200149 printf("%s: Could not find right length of data in bitstream\n",
150 __FUNCTION__);
wdenk30ce5ab2005-01-09 18:12:51 +0000151 return FPGA_FAIL;
152 }
wdenka562e1b2005-01-09 18:21:42 +0000153
wdenk30ce5ab2005-01-09 18:12:51 +0000154 /* allocate memory */
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200155 swapdata = (unsigned char *)malloc(swapsize);
wdenk30ce5ab2005-01-09 18:12:51 +0000156 if (swapdata == NULL) {
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200157 printf("%s: Could not allocate %d bytes memory !\n",
158 __FUNCTION__, swapsize);
wdenk30ce5ab2005-01-09 18:12:51 +0000159 return FPGA_FAIL;
160 }
wdenka562e1b2005-01-09 18:21:42 +0000161
wdenk30ce5ab2005-01-09 18:12:51 +0000162 /* read data into memory and swap bits */
163 ptr = swapdata;
164 for (i = 0; i < swapsize; i++) {
165 data = 0x00;
166 data |= (*dataptr & 0x01) << 7;
167 data |= (*dataptr & 0x02) << 5;
168 data |= (*dataptr & 0x04) << 3;
169 data |= (*dataptr & 0x08) << 1;
170 data |= (*dataptr & 0x10) >> 1;
171 data |= (*dataptr & 0x20) >> 3;
172 data |= (*dataptr & 0x40) >> 5;
173 data |= (*dataptr & 0x80) >> 7;
174 *ptr++ = data;
175 dataptr++;
176 }
177
178 rc = fpga_load(dev, swapdata, swapsize);
179 free(swapdata);
180 return rc;
181#else
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200182 printf("Bitstream support only for Xilinx devices\n");
wdenk30ce5ab2005-01-09 18:12:51 +0000183 return FPGA_FAIL;
184#endif
185}
186
wdenk4a9cbbe2002-08-27 09:48:53 +0000187/* ------------------------------------------------------------------------- */
188/* command form:
189 * fpga <op> <device number> <data addr> <datasize>
190 * where op is 'load', 'dump', or 'info'
191 * If there is no device number field, the fpga environment variable is used.
192 * If there is no data addr field, the fpgadata environment variable is used.
193 * The info command requires no data address field.
194 */
wdenkd4ca31c2004-01-02 14:00:00 +0000195int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
wdenk4a9cbbe2002-08-27 09:48:53 +0000196{
wdenkd4ca31c2004-01-02 14:00:00 +0000197 int op, dev = FPGA_INVALID_DEVICE;
198 size_t data_size = 0;
199 void *fpga_data = NULL;
200 char *devstr = getenv ("fpga");
201 char *datastr = getenv ("fpgadata");
202 int rc = FPGA_FAIL;
wdenk4a9cbbe2002-08-27 09:48:53 +0000203
wdenkd4ca31c2004-01-02 14:00:00 +0000204 if (devstr)
205 dev = (int) simple_strtoul (devstr, NULL, 16);
206 if (datastr)
207 fpga_data = (void *) simple_strtoul (datastr, NULL, 16);
wdenk4a9cbbe2002-08-27 09:48:53 +0000208
wdenkd4ca31c2004-01-02 14:00:00 +0000209 switch (argc) {
210 case 5: /* fpga <op> <dev> <data> <datasize> */
211 data_size = simple_strtoul (argv[4], NULL, 16);
212 case 4: /* fpga <op> <dev> <data> */
213 fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200214 PRINTF ("%s: fpga_data = 0x%x\n", __FUNCTION__, (uint) fpga_data);
wdenkd4ca31c2004-01-02 14:00:00 +0000215 case 3: /* fpga <op> <dev | data addr> */
216 dev = (int) simple_strtoul (argv[2], NULL, 16);
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200217 PRINTF ("%s: device = %d\n", __FUNCTION__, dev);
wdenkd4ca31c2004-01-02 14:00:00 +0000218 /* FIXME - this is a really weak test */
219 if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200220 PRINTF ("%s: Assuming buffer pointer in arg 3\n",
221 __FUNCTION__);
wdenkd4ca31c2004-01-02 14:00:00 +0000222 fpga_data = (void *) dev;
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200223 PRINTF ("%s: fpga_data = 0x%x\n",
224 __FUNCTION__, (uint) fpga_data);
wdenkd4ca31c2004-01-02 14:00:00 +0000225 dev = FPGA_INVALID_DEVICE; /* reset device num */
226 }
227 case 2: /* fpga <op> */
228 op = (int) fpga_get_op (argv[1]);
229 break;
230 default:
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200231 PRINTF ("%s: Too many or too few args (%d)\n",
232 __FUNCTION__, argc);
wdenkd4ca31c2004-01-02 14:00:00 +0000233 op = FPGA_NONE; /* force usage display */
234 break;
235 }
wdenk4a9cbbe2002-08-27 09:48:53 +0000236
wdenkd4ca31c2004-01-02 14:00:00 +0000237 switch (op) {
238 case FPGA_NONE:
239 fpga_usage (cmdtp);
240 break;
wdenk4a9cbbe2002-08-27 09:48:53 +0000241
wdenkd4ca31c2004-01-02 14:00:00 +0000242 case FPGA_INFO:
243 rc = fpga_info (dev);
244 break;
wdenk4a9cbbe2002-08-27 09:48:53 +0000245
wdenkd4ca31c2004-01-02 14:00:00 +0000246 case FPGA_LOAD:
247 rc = fpga_load (dev, fpga_data, data_size);
248 break;
wdenk4a9cbbe2002-08-27 09:48:53 +0000249
wdenk30ce5ab2005-01-09 18:12:51 +0000250 case FPGA_LOADB:
251 rc = fpga_loadbitstream(dev, fpga_data, data_size);
252 break;
253
wdenkd4ca31c2004-01-02 14:00:00 +0000254 case FPGA_DUMP:
255 rc = fpga_dump (dev, fpga_data, data_size);
256 break;
wdenk4a9cbbe2002-08-27 09:48:53 +0000257
wdenkd4ca31c2004-01-02 14:00:00 +0000258 default:
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200259 printf ("Unknown operation\n");
wdenkd4ca31c2004-01-02 14:00:00 +0000260 fpga_usage (cmdtp);
261 break;
262 }
263 return (rc);
wdenk4a9cbbe2002-08-27 09:48:53 +0000264}
265
wdenkd4ca31c2004-01-02 14:00:00 +0000266static void fpga_usage (cmd_tbl_t * cmdtp)
wdenk4a9cbbe2002-08-27 09:48:53 +0000267{
wdenkd4ca31c2004-01-02 14:00:00 +0000268 printf ("Usage:\n%s\n", cmdtp->usage);
wdenk4a9cbbe2002-08-27 09:48:53 +0000269}
270
271/*
272 * Map op to supported operations. We don't use a table since we
273 * would just have to relocate it from flash anyway.
274 */
wdenkd4ca31c2004-01-02 14:00:00 +0000275static int fpga_get_op (char *opstr)
wdenk4a9cbbe2002-08-27 09:48:53 +0000276{
277 int op = FPGA_NONE;
278
279 if (!strcmp ("info", opstr)) {
280 op = FPGA_INFO;
wdenk30ce5ab2005-01-09 18:12:51 +0000281 } else if (!strcmp ("loadb", opstr)) {
282 op = FPGA_LOADB;
wdenkd4ca31c2004-01-02 14:00:00 +0000283 } else if (!strcmp ("load", opstr)) {
wdenk4a9cbbe2002-08-27 09:48:53 +0000284 op = FPGA_LOAD;
wdenkd4ca31c2004-01-02 14:00:00 +0000285 } else if (!strcmp ("dump", opstr)) {
wdenk4a9cbbe2002-08-27 09:48:53 +0000286 op = FPGA_DUMP;
287 }
288
wdenkd4ca31c2004-01-02 14:00:00 +0000289 if (op == FPGA_NONE) {
wdenk4a9cbbe2002-08-27 09:48:53 +0000290 printf ("Unknown fpga operation \"%s\"\n", opstr);
291 }
292 return op;
293}
294
wdenkd4ca31c2004-01-02 14:00:00 +0000295U_BOOT_CMD (fpga, 6, 1, do_fpga,
wdenkdd875c72004-01-03 21:24:46 +0000296 "fpga - loadable FPGA image support\n",
wdenkd4ca31c2004-01-02 14:00:00 +0000297 "fpga [operation type] [device number] [image address] [image size]\n"
298 "fpga operations:\n"
Wolfgang Denk8b019da2005-08-08 00:14:41 +0200299 "\tinfo\tlist known device information\n"
300 "\tload\tLoad device from memory buffer\n"
301 "\tloadb\tLoad device from bitstream buffer (Xilinx devices only)\n"
302 "\tdump\tLoad device to memory buffer\n");
wdenkd4ca31c2004-01-02 14:00:00 +0000303#endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */