Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012-2013, Xilinx, Michal Simek |
| 3 | * |
| 4 | * (C) Copyright 2012 |
| 5 | * Joe Hershberger <joe.hershberger@ni.com> |
| 6 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef _ZYNQPL_H_ |
| 11 | #define _ZYNQPL_H_ |
| 12 | |
| 13 | #include <xilinx.h> |
| 14 | |
| 15 | extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size); |
| 16 | extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); |
| 17 | extern int zynq_info(Xilinx_desc *desc); |
| 18 | |
| 19 | #define XILINX_ZYNQ_7010 0x2 |
Michal Simek | 31993d6 | 2013-09-26 16:39:03 +0200 | [diff] [blame] | 20 | #define XILINX_ZYNQ_7015 0x1b |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 21 | #define XILINX_ZYNQ_7020 0x7 |
| 22 | #define XILINX_ZYNQ_7030 0xc |
| 23 | #define XILINX_ZYNQ_7045 0x11 |
Michal Simek | fd2b10b | 2013-06-17 13:54:07 +0200 | [diff] [blame] | 24 | #define XILINX_ZYNQ_7100 0x16 |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 25 | |
| 26 | /* Device Image Sizes */ |
| 27 | #define XILINX_XC7Z010_SIZE 16669920/8 |
Michal Simek | 31993d6 | 2013-09-26 16:39:03 +0200 | [diff] [blame] | 28 | #define XILINX_XC7Z015_SIZE 28085344/8 |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 29 | #define XILINX_XC7Z020_SIZE 32364512/8 |
| 30 | #define XILINX_XC7Z030_SIZE 47839328/8 |
| 31 | #define XILINX_XC7Z045_SIZE 106571232/8 |
Michal Simek | fd2b10b | 2013-06-17 13:54:07 +0200 | [diff] [blame] | 32 | #define XILINX_XC7Z100_SIZE 139330784/8 |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 33 | |
| 34 | /* Descriptor Macros */ |
| 35 | #define XILINX_XC7Z010_DESC(cookie) \ |
Michal Simek | 6631db4 | 2013-04-26 15:04:48 +0200 | [diff] [blame] | 36 | { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" } |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 37 | |
Michal Simek | 31993d6 | 2013-09-26 16:39:03 +0200 | [diff] [blame] | 38 | #define XILINX_XC7Z015_DESC(cookie) \ |
| 39 | { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" } |
| 40 | |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 41 | #define XILINX_XC7Z020_DESC(cookie) \ |
Michal Simek | 6631db4 | 2013-04-26 15:04:48 +0200 | [diff] [blame] | 42 | { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" } |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 43 | |
| 44 | #define XILINX_XC7Z030_DESC(cookie) \ |
Michal Simek | 6631db4 | 2013-04-26 15:04:48 +0200 | [diff] [blame] | 45 | { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" } |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 46 | |
| 47 | #define XILINX_XC7Z045_DESC(cookie) \ |
Michal Simek | 6631db4 | 2013-04-26 15:04:48 +0200 | [diff] [blame] | 48 | { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" } |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 49 | |
Michal Simek | fd2b10b | 2013-06-17 13:54:07 +0200 | [diff] [blame] | 50 | #define XILINX_XC7Z100_DESC(cookie) \ |
| 51 | { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" } |
| 52 | |
Michal Simek | d5dae85 | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 53 | #endif /* _ZYNQPL_H_ */ |