Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010,2011 |
| 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <ns16550.h> |
Jimmy Zhang | c5b34a2 | 2012-04-10 05:17:06 +0000 | [diff] [blame] | 10 | #include <linux/compiler.h> |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 11 | #include <asm/io.h> |
Simon Glass | b4ba2be | 2011-08-30 06:23:13 +0000 | [diff] [blame] | 12 | #include <asm/arch/clock.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 13 | #ifdef CONFIG_LCD |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 14 | #include <asm/arch/display.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 15 | #endif |
Lucas Stach | c0720af | 2012-09-29 10:02:09 +0000 | [diff] [blame] | 16 | #include <asm/arch/funcmux.h> |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 17 | #include <asm/arch/pinmux.h> |
Simon Glass | 8723626 | 2012-04-02 13:18:54 +0000 | [diff] [blame] | 18 | #include <asm/arch/pmu.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 19 | #ifdef CONFIG_PWM_TEGRA |
Simon Glass | e1ae0d1 | 2012-10-17 13:24:49 +0000 | [diff] [blame] | 20 | #include <asm/arch/pwm.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 21 | #endif |
Tom Warren | 150c249 | 2012-09-19 15:50:56 -0700 | [diff] [blame] | 22 | #include <asm/arch/tegra.h> |
Tom Warren | 150c249 | 2012-09-19 15:50:56 -0700 | [diff] [blame] | 23 | #include <asm/arch-tegra/board.h> |
| 24 | #include <asm/arch-tegra/clk_rst.h> |
| 25 | #include <asm/arch-tegra/pmc.h> |
| 26 | #include <asm/arch-tegra/sys_proto.h> |
| 27 | #include <asm/arch-tegra/uart.h> |
| 28 | #include <asm/arch-tegra/warmboot.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 29 | #ifdef CONFIG_TEGRA_CLOCK_SCALING |
| 30 | #include <asm/arch/emc.h> |
| 31 | #endif |
| 32 | #ifdef CONFIG_USB_EHCI_TEGRA |
Lucas Stach | 7ae18f3 | 2013-02-07 07:16:29 +0000 | [diff] [blame] | 33 | #include <asm/arch-tegra/usb.h> |
Jim Lin | 7e44d93 | 2013-06-21 19:05:47 +0800 | [diff] [blame] | 34 | #include <asm/arch/usb.h> |
Mateusz Zalega | 16297cf | 2013-10-04 19:22:26 +0200 | [diff] [blame] | 35 | #include <usb.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 36 | #endif |
Tom Warren | c9aa831 | 2013-02-21 12:31:30 +0000 | [diff] [blame] | 37 | #ifdef CONFIG_TEGRA_MMC |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 38 | #include <asm/arch-tegra/tegra_mmc.h> |
Tom Warren | c9aa831 | 2013-02-21 12:31:30 +0000 | [diff] [blame] | 39 | #include <asm/arch-tegra/mmc.h> |
| 40 | #endif |
Simon Glass | cb445fb | 2012-02-03 15:13:57 +0000 | [diff] [blame] | 41 | #include <i2c.h> |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 42 | #include <spi.h> |
Jimmy Zhang | c5b34a2 | 2012-04-10 05:17:06 +0000 | [diff] [blame] | 43 | #include "emc.h" |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 44 | |
| 45 | DECLARE_GLOBAL_DATA_PTR; |
| 46 | |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 47 | const struct tegra_sysinfo sysinfo = { |
| 48 | CONFIG_TEGRA_BOARD_STRING |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 49 | }; |
| 50 | |
Simon Glass | f10393e | 2012-02-27 10:52:50 +0000 | [diff] [blame] | 51 | void __pin_mux_usb(void) |
| 52 | { |
| 53 | } |
| 54 | |
| 55 | void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb"))); |
| 56 | |
Stephen Warren | e028494 | 2012-06-12 08:33:40 +0000 | [diff] [blame] | 57 | void __pin_mux_spi(void) |
| 58 | { |
| 59 | } |
| 60 | |
| 61 | void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi"))); |
| 62 | |
Lucas Stach | 0cd10c7 | 2012-09-25 20:21:14 +0000 | [diff] [blame] | 63 | void __gpio_early_init_uart(void) |
| 64 | { |
| 65 | } |
| 66 | |
| 67 | void gpio_early_init_uart(void) |
| 68 | __attribute__((weak, alias("__gpio_early_init_uart"))); |
| 69 | |
Tom Warren | dcd1251 | 2014-01-24 12:46:11 -0700 | [diff] [blame] | 70 | #if defined(CONFIG_TEGRA_NAND) |
Lucas Stach | c0720af | 2012-09-29 10:02:09 +0000 | [diff] [blame] | 71 | void __pin_mux_nand(void) |
| 72 | { |
| 73 | funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT); |
| 74 | } |
| 75 | |
| 76 | void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand"))); |
Tom Warren | dcd1251 | 2014-01-24 12:46:11 -0700 | [diff] [blame] | 77 | #endif |
Lucas Stach | c0720af | 2012-09-29 10:02:09 +0000 | [diff] [blame] | 78 | |
Marc Dietrich | 716d943 | 2012-11-25 11:26:11 +0000 | [diff] [blame] | 79 | void __pin_mux_display(void) |
| 80 | { |
| 81 | } |
| 82 | |
| 83 | void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display"))); |
| 84 | |
Tom Warren | f4ef666 | 2011-04-14 12:09:41 +0000 | [diff] [blame] | 85 | /* |
Wei Ni | 5aff021 | 2012-04-02 13:18:58 +0000 | [diff] [blame] | 86 | * Routine: power_det_init |
| 87 | * Description: turn off power detects |
| 88 | */ |
| 89 | static void power_det_init(void) |
| 90 | { |
Allen Martin | 00a2749 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 91 | #if defined(CONFIG_TEGRA20) |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 92 | struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; |
Wei Ni | 5aff021 | 2012-04-02 13:18:58 +0000 | [diff] [blame] | 93 | |
| 94 | /* turn off power detects */ |
| 95 | writel(0, &pmc->pmc_pwr_det_latch); |
| 96 | writel(0, &pmc->pmc_pwr_det); |
| 97 | #endif |
| 98 | } |
| 99 | |
| 100 | /* |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 101 | * Routine: board_init |
| 102 | * Description: Early hardware init. |
| 103 | */ |
| 104 | int board_init(void) |
| 105 | { |
Jimmy Zhang | c5b34a2 | 2012-04-10 05:17:06 +0000 | [diff] [blame] | 106 | __maybe_unused int err; |
| 107 | |
Simon Glass | a04eba9 | 2011-11-05 04:46:51 +0000 | [diff] [blame] | 108 | /* Do clocks and UART first so that printf() works */ |
Simon Glass | 4ed59e7 | 2011-09-21 12:40:04 +0000 | [diff] [blame] | 109 | clock_init(); |
| 110 | clock_verify(); |
| 111 | |
Allen Martin | 78f47b7 | 2013-03-16 18:58:07 +0000 | [diff] [blame] | 112 | #ifdef CONFIG_FDT_SPI |
Stephen Warren | e028494 | 2012-06-12 08:33:40 +0000 | [diff] [blame] | 113 | pin_mux_spi(); |
Tom Warren | 9112ef8 | 2011-11-05 09:48:11 +0000 | [diff] [blame] | 114 | spi_init(); |
| 115 | #endif |
Allen Martin | b19f574 | 2013-01-29 13:51:28 +0000 | [diff] [blame] | 116 | |
Simon Glass | e1ae0d1 | 2012-10-17 13:24:49 +0000 | [diff] [blame] | 117 | #ifdef CONFIG_PWM_TEGRA |
| 118 | if (pwm_init(gd->fdt_blob)) |
| 119 | debug("%s: Failed to init pwm\n", __func__); |
| 120 | #endif |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 121 | #ifdef CONFIG_LCD |
Marc Dietrich | 716d943 | 2012-11-25 11:26:11 +0000 | [diff] [blame] | 122 | pin_mux_display(); |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 123 | tegra_lcd_check_next_stage(gd->fdt_blob, 0); |
| 124 | #endif |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 125 | /* boot param addr */ |
| 126 | gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); |
Wei Ni | 5aff021 | 2012-04-02 13:18:58 +0000 | [diff] [blame] | 127 | |
| 128 | power_det_init(); |
| 129 | |
Simon Glass | 1f2ba72 | 2012-10-30 07:28:53 +0000 | [diff] [blame] | 130 | #ifdef CONFIG_SYS_I2C_TEGRA |
Simon Glass | cb445fb | 2012-02-03 15:13:57 +0000 | [diff] [blame] | 131 | #ifndef CONFIG_SYS_I2C_INIT_BOARD |
| 132 | #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards" |
| 133 | #endif |
| 134 | i2c_init_board(); |
Simon Glass | 8723626 | 2012-04-02 13:18:54 +0000 | [diff] [blame] | 135 | # ifdef CONFIG_TEGRA_PMU |
| 136 | if (pmu_set_nominal()) |
| 137 | debug("Failed to select nominal voltages\n"); |
Jimmy Zhang | c5b34a2 | 2012-04-10 05:17:06 +0000 | [diff] [blame] | 138 | # ifdef CONFIG_TEGRA_CLOCK_SCALING |
| 139 | err = board_emc_init(); |
| 140 | if (err) |
| 141 | debug("Memory controller init failed: %d\n", err); |
| 142 | # endif |
| 143 | # endif /* CONFIG_TEGRA_PMU */ |
Simon Glass | 1f2ba72 | 2012-10-30 07:28:53 +0000 | [diff] [blame] | 144 | #endif /* CONFIG_SYS_I2C_TEGRA */ |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 145 | |
Simon Glass | f10393e | 2012-02-27 10:52:50 +0000 | [diff] [blame] | 146 | #ifdef CONFIG_USB_EHCI_TEGRA |
| 147 | pin_mux_usb(); |
Mateusz Zalega | 16297cf | 2013-10-04 19:22:26 +0200 | [diff] [blame] | 148 | usb_process_devicetree(gd->fdt_blob); |
Simon Glass | f10393e | 2012-02-27 10:52:50 +0000 | [diff] [blame] | 149 | #endif |
Mateusz Zalega | 16297cf | 2013-10-04 19:22:26 +0200 | [diff] [blame] | 150 | |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 151 | #ifdef CONFIG_LCD |
| 152 | tegra_lcd_check_next_stage(gd->fdt_blob, 0); |
| 153 | #endif |
Simon Glass | f10393e | 2012-02-27 10:52:50 +0000 | [diff] [blame] | 154 | |
Lucas Stach | c0720af | 2012-09-29 10:02:09 +0000 | [diff] [blame] | 155 | #ifdef CONFIG_TEGRA_NAND |
| 156 | pin_mux_nand(); |
| 157 | #endif |
| 158 | |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 159 | #ifdef CONFIG_TEGRA_LP0 |
Allen Martin | a49716a | 2012-08-31 08:30:11 +0000 | [diff] [blame] | 160 | /* save Sdram params to PMC 2, 4, and 24 for WB0 */ |
| 161 | warmboot_save_sdram_params(); |
| 162 | |
Simon Glass | 67ac579 | 2012-04-02 13:18:57 +0000 | [diff] [blame] | 163 | /* prepare the WB code to LP0 location */ |
| 164 | warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); |
| 165 | #endif |
| 166 | |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 167 | return 0; |
| 168 | } |
Tom Warren | 21ef6a1 | 2011-05-31 10:30:37 +0000 | [diff] [blame] | 169 | |
Simon Glass | 3e00dbd | 2011-09-21 12:40:03 +0000 | [diff] [blame] | 170 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
Thierry Reding | cb7a1cf | 2012-06-04 20:02:27 +0000 | [diff] [blame] | 171 | static void __gpio_early_init(void) |
| 172 | { |
| 173 | } |
| 174 | |
| 175 | void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); |
| 176 | |
Simon Glass | 3e00dbd | 2011-09-21 12:40:03 +0000 | [diff] [blame] | 177 | int board_early_init_f(void) |
| 178 | { |
Tom Warren | 9482919 | 2013-01-28 13:32:12 +0000 | [diff] [blame] | 179 | #if !defined(CONFIG_TEGRA20) |
Tom Warren | 6d6c0ba | 2012-12-11 13:34:17 +0000 | [diff] [blame] | 180 | pinmux_init(); |
| 181 | #endif |
Simon Glass | f46a945 | 2011-11-28 15:04:40 +0000 | [diff] [blame] | 182 | board_init_uart_f(); |
Simon Glass | 3e00dbd | 2011-09-21 12:40:03 +0000 | [diff] [blame] | 183 | |
| 184 | /* Initialize periph GPIOs */ |
Thierry Reding | cb7a1cf | 2012-06-04 20:02:27 +0000 | [diff] [blame] | 185 | gpio_early_init(); |
Simon Glass | a04eba9 | 2011-11-05 04:46:51 +0000 | [diff] [blame] | 186 | gpio_early_init_uart(); |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 187 | #ifdef CONFIG_LCD |
| 188 | tegra_lcd_early_init(gd->fdt_blob); |
| 189 | #endif |
Lucas Stach | 0cd10c7 | 2012-09-25 20:21:14 +0000 | [diff] [blame] | 190 | |
Simon Glass | 3e00dbd | 2011-09-21 12:40:03 +0000 | [diff] [blame] | 191 | return 0; |
| 192 | } |
| 193 | #endif /* EARLY_INIT */ |
Simon Glass | 1b24a50 | 2012-10-17 13:24:52 +0000 | [diff] [blame] | 194 | |
| 195 | int board_late_init(void) |
| 196 | { |
| 197 | #ifdef CONFIG_LCD |
| 198 | /* Make sure we finish initing the LCD */ |
| 199 | tegra_lcd_check_next_stage(gd->fdt_blob, 1); |
| 200 | #endif |
| 201 | return 0; |
| 202 | } |
Tom Warren | c9aa831 | 2013-02-21 12:31:30 +0000 | [diff] [blame] | 203 | |
| 204 | #if defined(CONFIG_TEGRA_MMC) |
| 205 | void __pin_mux_mmc(void) |
| 206 | { |
| 207 | } |
| 208 | |
| 209 | void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc"))); |
| 210 | |
| 211 | /* this is a weak define that we are overriding */ |
| 212 | int board_mmc_init(bd_t *bd) |
| 213 | { |
| 214 | debug("%s called\n", __func__); |
| 215 | |
| 216 | /* Enable muxes, etc. for SDMMC controllers */ |
| 217 | pin_mux_mmc(); |
| 218 | |
| 219 | debug("%s: init MMC\n", __func__); |
| 220 | tegra_mmc_init(); |
| 221 | |
| 222 | return 0; |
| 223 | } |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 224 | |
| 225 | void pad_init_mmc(struct mmc_host *host) |
| 226 | { |
| 227 | #if defined(CONFIG_TEGRA30) |
| 228 | enum periph_id id = host->mmc_id; |
| 229 | u32 val; |
| 230 | |
| 231 | debug("%s: sdmmc address = %08x, id = %d\n", __func__, |
| 232 | (unsigned int)host->reg, id); |
| 233 | |
| 234 | /* Set the pad drive strength for SDMMC1 or 3 only */ |
| 235 | if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { |
| 236 | debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", |
| 237 | __func__); |
| 238 | return; |
| 239 | } |
| 240 | |
| 241 | val = readl(&host->reg->sdmemcmppadctl); |
| 242 | val &= 0xFFFFFFF0; |
| 243 | val |= MEMCOMP_PADCTRL_VREF; |
| 244 | writel(val, &host->reg->sdmemcmppadctl); |
| 245 | |
| 246 | val = readl(&host->reg->autocalcfg); |
| 247 | val &= 0xFFFF0000; |
| 248 | val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; |
| 249 | writel(val, &host->reg->autocalcfg); |
| 250 | #endif /* T30 */ |
| 251 | } |
| 252 | #endif /* MMC */ |