wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <mpc8xx.h> |
| 26 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 27 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 28 | |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 29 | #if defined(CONFIG_ENV_IS_IN_FLASH) |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 30 | # ifndef CONFIG_ENV_ADDR |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 31 | # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 32 | # endif |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 33 | # ifndef CONFIG_ENV_SIZE |
| 34 | # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 35 | # endif |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 36 | # ifndef CONFIG_ENV_SECT_SIZE |
| 37 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 38 | # endif |
| 39 | #endif |
| 40 | |
| 41 | /*----------------------------------------------------------------------- |
| 42 | * Functions |
| 43 | */ |
| 44 | static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
| 45 | static int write_word (flash_info_t *info, ulong dest, ulong data); |
| 46 | static void flash_get_offsets (ulong base, flash_info_t *info); |
| 47 | |
| 48 | /*----------------------------------------------------------------------- |
| 49 | */ |
| 50 | |
| 51 | unsigned long flash_init (void) |
| 52 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 54 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
| 55 | volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE; |
| 56 | unsigned long size; |
| 57 | int i; |
| 58 | |
| 59 | /* Init: enable write, |
| 60 | * or we cannot even write flash commands |
| 61 | */ |
| 62 | bcsr->bd_ctrl |= BD_CTRL_FLWE; |
| 63 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 65 | flash_info[i].flash_id = FLASH_UNKNOWN; |
| 66 | } |
| 67 | |
| 68 | /* Static FLASH Bank configuration here - FIXME XXX */ |
| 69 | |
| 70 | size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]); |
| 71 | |
| 72 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
| 73 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
| 74 | size, size<<20); |
| 75 | } |
| 76 | |
| 77 | /* Remap FLASH according to real size */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000); |
| 79 | memctl->memc_br1 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 80 | (memctl->memc_br1 & ~(BR_BA_MSK)); |
| 81 | |
| 82 | /* Re-do sizing to get full correct info */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 83 | size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 84 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 86 | |
| 87 | flash_info[0].size = size; |
| 88 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 90 | /* monitor protection ON by default */ |
| 91 | flash_protect(FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | CONFIG_SYS_MONITOR_BASE, |
| 93 | CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 94 | &flash_info[0]); |
| 95 | #endif |
| 96 | |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 97 | #ifdef CONFIG_ENV_IS_IN_FLASH |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 98 | /* ENV protection ON by default */ |
| 99 | flash_protect(FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 100 | CONFIG_ENV_ADDR, |
| 101 | CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1, |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 102 | &flash_info[0]); |
| 103 | #endif |
| 104 | return (size); |
| 105 | } |
| 106 | |
| 107 | /*----------------------------------------------------------------------- |
| 108 | */ |
| 109 | static void flash_get_offsets (ulong base, flash_info_t *info) |
| 110 | { |
| 111 | int i; |
| 112 | |
| 113 | /* all possible flash types |
| 114 | * (28F016SV, 28F160S3, 28F320S3) |
| 115 | * have the same erase block size: 64 kB per chip, |
| 116 | * of 128 kB per bank |
| 117 | */ |
| 118 | |
| 119 | /* set up sector start address table */ |
| 120 | for (i = 0; i < info->sector_count; i++) { |
| 121 | info->start[i] = base; |
| 122 | base += 0x00020000; |
| 123 | } |
| 124 | } |
| 125 | |
| 126 | /*----------------------------------------------------------------------- |
| 127 | */ |
| 128 | void flash_print_info (flash_info_t *info) |
| 129 | { |
| 130 | int i; |
| 131 | |
| 132 | if (info->flash_id == FLASH_UNKNOWN) { |
| 133 | printf ("missing or unknown FLASH type\n"); |
| 134 | return; |
| 135 | } |
| 136 | |
| 137 | switch (info->flash_id & FLASH_VENDMASK) { |
| 138 | case FLASH_MAN_INTEL: printf ("Intel "); break; |
| 139 | default: printf ("Unknown Vendor "); break; |
| 140 | } |
| 141 | |
| 142 | switch (info->flash_id & FLASH_TYPEMASK) { |
| 143 | case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n"); |
| 144 | break; |
| 145 | case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n"); |
| 146 | break; |
| 147 | case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n"); |
| 148 | break; |
| 149 | default: printf ("Unknown Chip Type\n"); |
| 150 | break; |
| 151 | } |
| 152 | |
| 153 | printf (" Size: %ld MB in %d Sectors\n", |
| 154 | info->size >> 20, info->sector_count); |
| 155 | |
| 156 | printf (" Sector Start Addresses:"); |
| 157 | for (i=0; i<info->sector_count; ++i) { |
| 158 | if ((i % 5) == 0) |
| 159 | printf ("\n "); |
| 160 | printf (" %08lX%s", |
| 161 | info->start[i], |
| 162 | info->protect[i] ? " (RO)" : " " |
| 163 | ); |
| 164 | } |
| 165 | printf ("\n"); |
| 166 | return; |
| 167 | } |
| 168 | |
| 169 | /*----------------------------------------------------------------------- |
| 170 | */ |
| 171 | |
| 172 | |
| 173 | /*----------------------------------------------------------------------- |
| 174 | */ |
| 175 | |
| 176 | /* |
| 177 | * The following code cannot be run from FLASH! |
| 178 | */ |
| 179 | |
| 180 | static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
| 181 | { |
| 182 | short i; |
| 183 | ulong value; |
| 184 | ulong base = (ulong)addr; |
| 185 | |
| 186 | /* Write "Intelligent Identifier" command: read Manufacturer ID */ |
| 187 | *addr = 0x90909090; |
| 188 | |
| 189 | value = addr[0]; |
| 190 | switch (value) { |
| 191 | case (MT_MANUFACT & 0x00FF00FF): /* MT or => Intel */ |
| 192 | case (INTEL_ALT_MANU & 0x00FF00FF): |
| 193 | info->flash_id = FLASH_MAN_INTEL; |
| 194 | break; |
| 195 | default: |
| 196 | info->flash_id = FLASH_UNKNOWN; |
| 197 | info->sector_count = 0; |
| 198 | info->size = 0; |
| 199 | return (0); /* no or unknown flash */ |
| 200 | } |
| 201 | |
| 202 | value = addr[1]; /* device ID */ |
| 203 | |
| 204 | switch (value) { |
| 205 | case (INTEL_ID_28F016S): |
| 206 | info->flash_id += FLASH_28F016SV; |
| 207 | info->sector_count = 32; |
| 208 | info->size = 0x00400000; |
| 209 | break; /* => 2x2 MB */ |
| 210 | |
| 211 | case (INTEL_ID_28F160S3): |
| 212 | info->flash_id += FLASH_28F160S3; |
| 213 | info->sector_count = 32; |
| 214 | info->size = 0x00400000; |
| 215 | break; /* => 2x2 MB */ |
| 216 | |
| 217 | case (INTEL_ID_28F320S3): |
| 218 | info->flash_id += FLASH_28F320S3; |
| 219 | info->sector_count = 64; |
| 220 | info->size = 0x00800000; |
| 221 | break; /* => 2x4 MB */ |
| 222 | |
| 223 | default: |
| 224 | info->flash_id = FLASH_UNKNOWN; |
| 225 | return (0); /* => no or unknown flash */ |
| 226 | |
| 227 | } |
| 228 | |
| 229 | /* set up sector start address table */ |
| 230 | for (i = 0; i < info->sector_count; i++) { |
| 231 | info->start[i] = base + (i * 0x00020000); |
| 232 | /* don't know how to check sector protection */ |
| 233 | info->protect[i] = 0; |
| 234 | } |
| 235 | |
| 236 | /* |
| 237 | * Prevent writes to uninitialized FLASH. |
| 238 | */ |
| 239 | if (info->flash_id != FLASH_UNKNOWN) { |
| 240 | addr = (vu_long *)info->start[0]; |
| 241 | |
| 242 | *addr = 0xFFFFFF; /* reset bank to read array mode */ |
| 243 | } |
| 244 | |
| 245 | return (info->size); |
| 246 | } |
| 247 | |
| 248 | |
| 249 | /*----------------------------------------------------------------------- |
| 250 | */ |
| 251 | |
| 252 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
| 253 | { |
| 254 | int flag, prot, sect; |
| 255 | ulong start, now, last; |
| 256 | |
| 257 | if ((s_first < 0) || (s_first > s_last)) { |
| 258 | if (info->flash_id == FLASH_UNKNOWN) { |
| 259 | printf ("- missing\n"); |
| 260 | } else { |
| 261 | printf ("- no sectors to erase\n"); |
| 262 | } |
| 263 | return 1; |
| 264 | } |
| 265 | |
| 266 | if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) { |
| 267 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 268 | info->flash_id); |
| 269 | return 1; |
| 270 | } |
| 271 | |
| 272 | prot = 0; |
| 273 | for (sect=s_first; sect<=s_last; ++sect) { |
| 274 | if (info->protect[sect]) { |
| 275 | prot++; |
| 276 | } |
| 277 | } |
| 278 | |
| 279 | if (prot) { |
| 280 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 281 | prot); |
| 282 | } else { |
| 283 | printf ("\n"); |
| 284 | } |
| 285 | |
| 286 | start = get_timer (0); |
| 287 | last = start; |
| 288 | |
| 289 | /* Start erase on unprotected sectors */ |
| 290 | for (sect = s_first; sect<=s_last; sect++) { |
| 291 | if (info->protect[sect] == 0) { /* not protected */ |
| 292 | vu_long *addr = (vu_long *)(info->start[sect]); |
| 293 | |
| 294 | /* Disable interrupts which might cause a timeout here */ |
| 295 | flag = disable_interrupts(); |
| 296 | |
| 297 | /* Single Block Erase Command */ |
| 298 | *addr = 0x20202020; |
| 299 | /* Confirm */ |
| 300 | *addr = 0xD0D0D0D0; |
| 301 | /* Resume Command, as per errata update */ |
| 302 | *addr = 0xD0D0D0D0; |
| 303 | |
| 304 | /* re-enable interrupts if necessary */ |
| 305 | if (flag) |
| 306 | enable_interrupts(); |
| 307 | |
| 308 | /* wait at least 80us - let's wait 1 ms */ |
| 309 | udelay (1000); |
| 310 | |
| 311 | while ((*addr & 0x00800080) != 0x00800080) { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 312 | if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 313 | printf ("Timeout\n"); |
| 314 | *addr = 0xFFFFFFFF; /* reset bank */ |
| 315 | return 1; |
| 316 | } |
| 317 | /* show that we're waiting */ |
| 318 | if ((now - last) > 1000) { /* every second */ |
| 319 | putc ('.'); |
| 320 | last = now; |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | /* reset to read mode */ |
| 325 | *addr = 0xFFFFFFFF; |
| 326 | } |
| 327 | } |
| 328 | |
| 329 | printf (" done\n"); |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | /*----------------------------------------------------------------------- |
| 334 | * Copy memory to flash, returns: |
| 335 | * 0 - OK |
| 336 | * 1 - write timeout |
| 337 | * 2 - Flash not erased |
| 338 | */ |
| 339 | |
| 340 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 341 | { |
| 342 | ulong cp, wp, data; |
| 343 | int i, l, rc; |
| 344 | |
| 345 | wp = (addr & ~3); /* get lower word aligned address */ |
| 346 | |
| 347 | /* |
| 348 | * handle unaligned start bytes |
| 349 | */ |
| 350 | if ((l = addr - wp) != 0) { |
| 351 | data = 0; |
| 352 | for (i=0, cp=wp; i<l; ++i, ++cp) { |
| 353 | data = (data << 8) | (*(uchar *)cp); |
| 354 | } |
| 355 | for (; i<4 && cnt>0; ++i) { |
| 356 | data = (data << 8) | *src++; |
| 357 | --cnt; |
| 358 | ++cp; |
| 359 | } |
| 360 | for (; cnt==0 && i<4; ++i, ++cp) { |
| 361 | data = (data << 8) | (*(uchar *)cp); |
| 362 | } |
| 363 | |
| 364 | if ((rc = write_word(info, wp, data)) != 0) { |
| 365 | return (rc); |
| 366 | } |
| 367 | wp += 4; |
| 368 | } |
| 369 | |
| 370 | /* |
| 371 | * handle word aligned part |
| 372 | */ |
| 373 | while (cnt >= 4) { |
| 374 | data = 0; |
| 375 | for (i=0; i<4; ++i) { |
| 376 | data = (data << 8) | *src++; |
| 377 | } |
| 378 | if ((rc = write_word(info, wp, data)) != 0) { |
| 379 | return (rc); |
| 380 | } |
| 381 | wp += 4; |
| 382 | cnt -= 4; |
| 383 | } |
| 384 | |
| 385 | if (cnt == 0) { |
| 386 | return (0); |
| 387 | } |
| 388 | |
| 389 | /* |
| 390 | * handle unaligned tail bytes |
| 391 | */ |
| 392 | data = 0; |
| 393 | for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
| 394 | data = (data << 8) | *src++; |
| 395 | --cnt; |
| 396 | } |
| 397 | for (; i<4; ++i, ++cp) { |
| 398 | data = (data << 8) | (*(uchar *)cp); |
| 399 | } |
| 400 | |
| 401 | return (write_word(info, wp, data)); |
| 402 | } |
| 403 | |
| 404 | /*----------------------------------------------------------------------- |
| 405 | * Write a word to Flash, returns: |
| 406 | * 0 - OK |
| 407 | * 1 - write timeout |
| 408 | * 2 - Flash not erased |
| 409 | */ |
| 410 | static int write_word (flash_info_t *info, ulong dest, ulong data) |
| 411 | { |
| 412 | vu_long *addr = (vu_long *)dest; |
| 413 | ulong start, csr; |
| 414 | int flag; |
| 415 | |
| 416 | /* Check if Flash is (sufficiently) erased */ |
| 417 | if ((*addr & data) != data) { |
| 418 | return (2); |
| 419 | } |
| 420 | /* Disable interrupts which might cause a timeout here */ |
| 421 | flag = disable_interrupts(); |
| 422 | |
| 423 | /* Write Command */ |
| 424 | *addr = 0x10101010; |
| 425 | |
| 426 | /* Write Data */ |
| 427 | *addr = data; |
| 428 | |
| 429 | /* re-enable interrupts if necessary */ |
| 430 | if (flag) |
| 431 | enable_interrupts(); |
| 432 | |
| 433 | /* data polling for D7 */ |
| 434 | start = get_timer (0); |
| 435 | flag = 0; |
| 436 | while (((csr = *addr) & 0x00800080) != 0x00800080) { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 437 | if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 438 | flag = 1; |
| 439 | break; |
| 440 | } |
| 441 | } |
| 442 | if (csr & 0x00400040) { |
| 443 | printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr); |
| 444 | flag = 1; |
| 445 | } |
| 446 | |
| 447 | /* Clear Status Registers Command */ |
| 448 | *addr = 0x50505050; |
| 449 | /* Reset to read array mode */ |
| 450 | *addr = 0xFFFFFFFF; |
| 451 | |
| 452 | return (flag); |
| 453 | } |
| 454 | |
| 455 | /*----------------------------------------------------------------------- |
| 456 | */ |