blob: 80bcd2545102ea8e3b21f5aef3a541ef71afed71 [file] [log] [blame]
wdenk89930722002-09-18 07:25:03 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <common.h>
28#include <mpc8xx.h>
29
30flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
31
32#if defined(CFG_ENV_IS_IN_FLASH)
33# ifndef CFG_ENV_ADDR
34# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
35# endif
36# ifndef CFG_ENV_SIZE
37# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
38# endif
39# ifndef CFG_ENV_SECT_SIZE
40# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
41# endif
42#endif
43
44/*-----------------------------------------------------------------------
45 * Protection Flags:
46 */
47#define FLAG_PROTECT_SET 0x01
48#define FLAG_PROTECT_CLEAR 0x02
49
50/* Board support for 1 or 2 flash devices */
51#undef FLASH_PORT_WIDTH32
52#define FLASH_PORT_WIDTH16
53
54#ifdef FLASH_PORT_WIDTH16
55#define FLASH_PORT_WIDTH ushort
56#define FLASH_PORT_WIDTHV vu_short
57#else
58#define FLASH_PORT_WIDTH ulong
59#define FLASH_PORT_WIDTHV vu_long
60#endif
61
62#define FPW FLASH_PORT_WIDTH
63#define FPWV FLASH_PORT_WIDTHV
64
65/*-----------------------------------------------------------------------
66 * Functions
67 */
68static ulong flash_get_size (FPW *addr, flash_info_t *info);
69static int write_data (flash_info_t *info, ulong dest, FPW data);
70static void flash_get_offsets (ulong base, flash_info_t *info);
71
72/*-----------------------------------------------------------------------
73 */
74
75unsigned long flash_init (void)
76{
77 volatile immap_t *immap = (immap_t *)CFG_IMMR;
78 volatile memctl8xx_t *memctl = &immap->im_memctl;
79 unsigned long size_b0;
80 int i;
81
82 /* Init: no FLASHes known */
83 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
84 flash_info[i].flash_id = FLASH_UNKNOWN;
85 }
86
87 /* Static FLASH Bank configuration here - FIXME XXX */
88 size_b0 = flash_get_size((FPW *)FLASH_BASE0_PRELIM, &flash_info[0]);
89
90 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
91 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
92 size_b0, size_b0<<20);
93 }
94
95 /* Remap FLASH according to real size */
96 memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
97 memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
98
99 /* Re-do sizing to get full correct info */
100 size_b0 = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
101
102 flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
103
104#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
105 /* monitor protection ON by default */
106 (void)flash_protect(FLAG_PROTECT_SET,
107 CFG_FLASH_BASE,
108 CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
109 &flash_info[0]);
110#endif
111
112#ifdef CFG_ENV_IS_IN_FLASH
113 /* ENV protection ON by default */
114 flash_protect(FLAG_PROTECT_SET,
115 CFG_ENV_ADDR,
116 CFG_ENV_ADDR+CFG_ENV_SIZE-1,
117 &flash_info[0]);
118#endif
119
120 flash_info[0].size = size_b0;
121
122 return (size_b0);
123}
124
125/*-----------------------------------------------------------------------
126 */
127static void flash_get_offsets (ulong base, flash_info_t *info)
128{
129 int i;
130
131 if (info->flash_id == FLASH_UNKNOWN) {
132 return;
133 }
134
135 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
136 for (i = 0; i < info->sector_count; i++) {
137 info->start[i] = base + (i * 0x00020000);
138 }
139 }
140}
141
142/*-----------------------------------------------------------------------
143 */
144void flash_print_info (flash_info_t *info)
145{
146 int i;
147
148 if (info->flash_id == FLASH_UNKNOWN) {
149 printf ("missing or unknown FLASH type\n");
150 return;
151 }
152
153 switch (info->flash_id & FLASH_VENDMASK) {
154 case FLASH_MAN_INTEL: printf ("INTEL "); break;
155 default: printf ("Unknown Vendor "); break;
156 }
157
158 switch (info->flash_id & FLASH_TYPEMASK) {
159 case FLASH_28F320J3A:
160 printf ("28F320J3A\n"); break;
161 case FLASH_28F640J3A:
162 printf ("28F640J3A\n"); break;
163 case FLASH_28F128J3A:
164 printf ("28F128J3A\n"); break;
165 default: printf ("Unknown Chip Type\n"); break;
166 }
167
168 printf (" Size: %ld MB in %d Sectors\n",
169 info->size >> 20, info->sector_count);
170
171 printf (" Sector Start Addresses:");
172 for (i=0; i<info->sector_count; ++i) {
173 if ((i % 5) == 0)
174 printf ("\n ");
175 printf (" %08lX%s",
176 info->start[i],
177 info->protect[i] ? " (RO)" : " "
178 );
179 }
180 printf ("\n");
181 return;
182}
183
184/*-----------------------------------------------------------------------
185 */
186
187
188/*-----------------------------------------------------------------------
189 */
190
191/*
192 * The following code cannot be run from FLASH!
193 */
194
195static ulong flash_get_size (FPW *addr, flash_info_t *info)
196{
197 FPW value;
198
199 /* Write auto select command: read Manufacturer ID */
200 addr[0x5555] = (FPW)0x00AA00AA;
201 addr[0x2AAA] = (FPW)0x00550055;
202 addr[0x5555] = (FPW)0x00900090;
203
204 value = addr[0];
205
206 switch (value) {
207 case (FPW)INTEL_MANUFACT:
208 info->flash_id = FLASH_MAN_INTEL;
209 break;
210 default:
211 info->flash_id = FLASH_UNKNOWN;
212 info->sector_count = 0;
213 info->size = 0;
214 addr[0] = (FPW)0x00FF00FF; /* restore read mode */
215 return (0); /* no or unknown flash */
216 }
217
218 value = addr[1]; /* device ID */
219
220 switch (value) {
221 case (FPW)INTEL_ID_28F320J3A:
222 info->flash_id += FLASH_28F320J3A;
223 info->sector_count = 32;
224 info->size = 0x00400000;
225 break; /* => 4 MB */
226
227 case (FPW)INTEL_ID_28F640J3A:
228 info->flash_id += FLASH_28F640J3A;
229 info->sector_count = 64;
230 info->size = 0x00800000;
231 break; /* => 8 MB */
232
233 case (FPW)INTEL_ID_28F128J3A:
234 info->flash_id += FLASH_28F128J3A;
235 info->sector_count = 128;
236 info->size = 0x01000000;
237 break; /* => 16 MB */
238
239 default:
240 info->flash_id = FLASH_UNKNOWN;
241 break;
242 }
243
244 if (info->sector_count > CFG_MAX_FLASH_SECT) {
245 printf ("** ERROR: sector count %d > max (%d) **\n",
246 info->sector_count, CFG_MAX_FLASH_SECT);
247 info->sector_count = CFG_MAX_FLASH_SECT;
248 }
249
250 addr[0] = (FPW)0x00FF00FF; /* restore read mode */
251
252 return (info->size);
253}
254
255
256/*-----------------------------------------------------------------------
257 */
258
259int flash_erase (flash_info_t *info, int s_first, int s_last)
260{
261 int flag, prot, sect;
262 ulong type, start, now, last;
263 int rcode = 0;
264
265 if ((s_first < 0) || (s_first > s_last)) {
266 if (info->flash_id == FLASH_UNKNOWN) {
267 printf ("- missing\n");
268 } else {
269 printf ("- no sectors to erase\n");
270 }
271 return 1;
272 }
273
274 type = (info->flash_id & FLASH_VENDMASK);
275 if ((type != FLASH_MAN_INTEL)) {
276 printf ("Can't erase unknown flash type %08lx - aborted\n",
277 info->flash_id);
278 return 1;
279 }
280
281 prot = 0;
282 for (sect=s_first; sect<=s_last; ++sect) {
283 if (info->protect[sect]) {
284 prot++;
285 }
286 }
287
288 if (prot) {
289 printf ("- Warning: %d protected sectors will not be erased!\n",
290 prot);
291 } else {
292 printf ("\n");
293 }
294
295 start = get_timer (0);
296 last = start;
297 /* Start erase on unprotected sectors */
298 for (sect = s_first; sect<=s_last; sect++) {
299 if (info->protect[sect] == 0) { /* not protected */
300 FPWV *addr = (FPWV *)(info->start[sect]);
301 FPW status;
302
303 /* Disable interrupts which might cause a timeout here */
304 flag = disable_interrupts();
305
306 *addr = (FPW)0x00500050; /* clear status register */
307 *addr = (FPW)0x00200020; /* erase setup */
308 *addr = (FPW)0x00D000D0; /* erase confirm */
309
310 /* re-enable interrupts if necessary */
311 if (flag)
312 enable_interrupts();
313
314 /* wait at least 80us - let's wait 1 ms */
315 udelay (1000);
316
317 while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
318 if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
319 printf ("Timeout\n");
320 *addr = (FPW)0x00B000B0; /* suspend erase */
321 *addr = (FPW)0x00FF00FF; /* reset to read mode */
322 rcode = 1;
323 break;
324 }
325
326 /* show that we're waiting */
327 if ((now - last) > 1000) { /* every second */
328 putc ('.');
329 last = now;
330 }
331 }
332
333 *addr = (FPW)0x00FF00FF; /* reset to read mode */
334 }
335 }
336 printf (" done\n");
337 return rcode;
338}
339
340/*-----------------------------------------------------------------------
341 * Copy memory to flash, returns:
342 * 0 - OK
343 * 1 - write timeout
344 * 2 - Flash not erased
345 * 4 - Flash not identified
346 */
347
348int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
349{
350 ulong cp, wp;
351 FPW data;
352#if 0
353 int count, i, l, rc, port_width;
354#else
355 int i, l, rc, port_width;
356#endif
357
358 if (info->flash_id == FLASH_UNKNOWN) {
359 return 4;
360 }
361/* get lower word aligned address */
362#ifdef FLASH_PORT_WIDTH16
363 wp = (addr & ~1);
364 port_width = 2;
365#else
366 wp = (addr & ~3);
367 port_width = 4;
368#endif
369
370 /*
371 * handle unaligned start bytes
372 */
373 if ((l = addr - wp) != 0) {
374 data = 0;
375 for (i=0, cp=wp; i<l; ++i, ++cp) {
376 data = (data << 8) | (*(uchar *)cp);
377 }
378 for (; i<port_width && cnt>0; ++i) {
379 data = (data << 8) | *src++;
380 --cnt;
381 ++cp;
382 }
383 for (; cnt==0 && i<port_width; ++i, ++cp) {
384 data = (data << 8) | (*(uchar *)cp);
385 }
386
387 if ((rc = write_data(info, wp, data)) != 0) {
388 return (rc);
389 }
390 wp += port_width;
391 }
392
393 /*
394 * handle word aligned part
395 */
396#if 0
397 count = 0;
398#endif
399 while (cnt >= port_width) {
400 data = 0;
401 for (i=0; i<port_width; ++i) {
402 data = (data << 8) | *src++;
403 }
404 if ((rc = write_data(info, wp, data)) != 0) {
405 return (rc);
406 }
407 wp += port_width;
408 cnt -= port_width;
409#if 0
410 if (count++ > 0x20000)
411 {
412 putc('.');
413 count = 0;
414 }
415#endif
416 }
417
418 if (cnt == 0) {
419 return (0);
420 }
421
422 /*
423 * handle unaligned tail bytes
424 */
425 data = 0;
426 for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
427 data = (data << 8) | *src++;
428 --cnt;
429 }
430 for (; i<port_width; ++i, ++cp) {
431 data = (data << 8) | (*(uchar *)cp);
432 }
433
434 return (write_data(info, wp, data));
435}
436
437/*-----------------------------------------------------------------------
438 * Write a word or halfword to Flash, returns:
439 * 0 - OK
440 * 1 - write timeout
441 * 2 - Flash not erased
442 */
443static int write_data (flash_info_t *info, ulong dest, FPW data)
444{
445 FPWV *addr = (FPWV *)dest;
446 ulong status;
447 ulong start;
448 int flag;
449
450 /* Check if Flash is (sufficiently) erased */
451 if ((*addr & data) != data) {
452 printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
453 return (2);
454 }
455 /* Disable interrupts which might cause a timeout here */
456 flag = disable_interrupts();
457
458 *addr = (FPW)0x00400040; /* write setup */
459 *addr = data;
460
461 /* re-enable interrupts if necessary */
462 if (flag)
463 enable_interrupts();
464
465 start = get_timer (0);
466
467 while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
468 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
469 *addr = (FPW)0x00FF00FF; /* restore read mode */
470 return (1);
471 }
472 }
473
474 *addr = (FPW)0x00FF00FF; /* restore read mode */
475
476 return (0);
477}
478