wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 7 | * Marius Groeger <mgroeger@sysgo.de> |
| 8 | * |
| 9 | * (C) Copyright 2002 |
| 10 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 11 | * Alex Zuepke <azu@sysgo.de> |
| 12 | * |
| 13 | * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 28 | * |
| 29 | */ |
| 30 | |
| 31 | #include <common.h> |
| 32 | #include <SA-1100.h> |
| 33 | |
Wolfgang Denk | d87080b | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 36 | void serial_setbrg (void) |
| 37 | { |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 38 | unsigned int reg = 0; |
| 39 | |
| 40 | if (gd->baudrate == 1200) |
| 41 | reg = 191; |
| 42 | else if (gd->baudrate == 9600) |
| 43 | reg = 23; |
| 44 | else if (gd->baudrate == 19200) |
| 45 | reg = 11; |
| 46 | else if (gd->baudrate == 38400) |
| 47 | reg = 5; |
| 48 | else if (gd->baudrate == 57600) |
| 49 | reg = 3; |
| 50 | else if (gd->baudrate == 115200) |
| 51 | reg = 1; |
| 52 | else |
| 53 | hang (); |
| 54 | |
| 55 | #ifdef CONFIG_SERIAL1 |
wdenk | dc7c9a1 | 2003-03-26 06:55:25 +0000 | [diff] [blame] | 56 | /* SA1110 uart function */ |
| 57 | Ser1SDCR0 |= SDCR0_SUS; |
| 58 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 59 | /* Wait until port is ready ... */ |
wdenk | dc7c9a1 | 2003-03-26 06:55:25 +0000 | [diff] [blame] | 60 | while(Ser1UTSR1 & UTSR1_TBY) {} |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 61 | |
| 62 | /* init serial serial 1 */ |
| 63 | Ser1UTCR3 = 0x00; |
| 64 | Ser1UTSR0 = 0xff; |
wdenk | dc7c9a1 | 2003-03-26 06:55:25 +0000 | [diff] [blame] | 65 | Ser1UTCR0 = ( UTCR0_1StpBit | UTCR0_8BitData ); |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 66 | Ser1UTCR1 = 0; |
wdenk | dc7c9a1 | 2003-03-26 06:55:25 +0000 | [diff] [blame] | 67 | Ser1UTCR2 = (u32)reg; |
| 68 | Ser1UTCR3 = ( UTCR3_RXE | UTCR3_TXE ); |
wdenk | 42dfe7a | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 69 | #elif defined(CONFIG_SERIAL3) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 70 | /* Wait until port is ready ... */ |
| 71 | while (Ser3UTSR1 & UTSR1_TBY) { |
| 72 | } |
| 73 | |
| 74 | /* init serial serial 3 */ |
| 75 | Ser3UTCR3 = 0x00; |
| 76 | Ser3UTSR0 = 0xff; |
| 77 | Ser3UTCR0 = (UTCR0_1StpBit | UTCR0_8BitData); |
| 78 | Ser3UTCR1 = 0; |
| 79 | Ser3UTCR2 = (u32) reg; |
| 80 | Ser3UTCR3 = (UTCR3_RXE | UTCR3_TXE); |
| 81 | #else |
| 82 | #error "Bad: you didn't configured serial ..." |
| 83 | #endif |
| 84 | } |
| 85 | |
| 86 | |
| 87 | /* |
| 88 | * Initialise the serial port with the given baudrate. The settings |
| 89 | * are always 8 data bits, no parity, 1 stop bit, no start bits. |
| 90 | * |
| 91 | */ |
| 92 | int serial_init (void) |
| 93 | { |
| 94 | serial_setbrg (); |
| 95 | |
| 96 | return (0); |
| 97 | } |
| 98 | |
| 99 | |
| 100 | /* |
| 101 | * Output a single byte to the serial port. |
| 102 | */ |
| 103 | void serial_putc (const char c) |
| 104 | { |
| 105 | #ifdef CONFIG_SERIAL1 |
| 106 | /* wait for room in the tx FIFO on SERIAL1 */ |
| 107 | while ((Ser1UTSR0 & UTSR0_TFS) == 0); |
| 108 | |
| 109 | Ser1UTDR = c; |
wdenk | 42dfe7a | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 110 | #elif defined(CONFIG_SERIAL3) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 111 | /* wait for room in the tx FIFO on SERIAL3 */ |
| 112 | while ((Ser3UTSR0 & UTSR0_TFS) == 0); |
| 113 | |
| 114 | Ser3UTDR = c; |
| 115 | #endif |
| 116 | |
| 117 | /* If \n, also do \r */ |
| 118 | if (c == '\n') |
| 119 | serial_putc ('\r'); |
| 120 | } |
| 121 | |
| 122 | /* |
| 123 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 124 | * otherwise. When the function is succesfull, the character read is |
| 125 | * written into its argument c. |
| 126 | */ |
| 127 | int serial_tstc (void) |
| 128 | { |
| 129 | #ifdef CONFIG_SERIAL1 |
| 130 | return Ser1UTSR1 & UTSR1_RNE; |
wdenk | 42dfe7a | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 131 | #elif defined(CONFIG_SERIAL3) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 132 | return Ser3UTSR1 & UTSR1_RNE; |
| 133 | #endif |
| 134 | } |
| 135 | |
| 136 | /* |
| 137 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 138 | * otherwise. When the function is succesfull, the character read is |
| 139 | * written into its argument c. |
| 140 | */ |
| 141 | int serial_getc (void) |
| 142 | { |
| 143 | #ifdef CONFIG_SERIAL1 |
| 144 | while (!(Ser1UTSR1 & UTSR1_RNE)); |
| 145 | |
| 146 | return (char) Ser1UTDR & 0xff; |
wdenk | 42dfe7a | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 147 | #elif defined(CONFIG_SERIAL3) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 148 | while (!(Ser3UTSR1 & UTSR1_RNE)); |
| 149 | |
| 150 | return (char) Ser3UTDR & 0xff; |
| 151 | #endif |
| 152 | } |
| 153 | |
| 154 | void |
| 155 | serial_puts (const char *s) |
| 156 | { |
| 157 | while (*s) { |
| 158 | serial_putc (*s++); |
| 159 | } |
| 160 | } |