| Dinh Nguyen | 84b124d | 2019-04-23 16:55:03 -0500 | [diff] [blame] | 1 | # |
| 2 | # Cache controllers |
| 3 | # |
| 4 | |
| 5 | menu "Cache Controller drivers" |
| 6 | |
| 7 | config CACHE |
| 8 | bool "Enable Driver Model for Cache controllers" |
| 9 | depends on DM |
| 10 | help |
| 11 | Enable driver model for cache controllers that are found on |
| 12 | most CPU's. Cache is memory that the CPU can access directly and |
| 13 | is usually located on the same chip. This uclass can be used for |
| 14 | configuring settings that be found from a device tree file. |
| 15 | |
| Dinh Nguyen | 88ebf58 | 2019-04-23 16:55:04 -0500 | [diff] [blame^] | 16 | config L2X0_CACHE |
| 17 | tristate "PL310 cache driver" |
| 18 | select CACHE |
| 19 | depends on ARM |
| 20 | help |
| 21 | This driver is for the PL310 cache controller commonly found on |
| 22 | ARMv7(32-bit) devices. The driver configures the cache settings |
| 23 | found in the device tree. |
| 24 | |
| Dinh Nguyen | 84b124d | 2019-04-23 16:55:03 -0500 | [diff] [blame] | 25 | endmenu |