blob: 92f5a3fcb598bf0e192fe1f42ecd8be608a4d935 [file] [log] [blame]
Roy Zang3f7f6b82011-06-09 11:30:52 +08001/*
2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Roy Zang3f7f6b82011-06-09 11:30:52 +08005 */
6
7#include <common.h>
8#include <asm/fsl_law.h>
9#include <asm/mmu.h>
10
11struct law_entry law_table[] = {
12 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
13 SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_4M,
14 LAW_TRGT_IF_DPAA_SWP_SRAM),
15 /* The LAW 0xe0000000 ~ 0xefffffff for BCSR and NOR flash */
16 SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
17};
18
19int num_law_entries = ARRAY_SIZE(law_table);