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wdenka56bd922004-06-06 23:13:55 +00001/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * TI H2 and P2 Debug Board hardware map
5 *
6 * Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk)
7 * Author: MPC-Data Limited
8 * Dave Peverley
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#ifndef __INCLUDED_H2_P2_DBH_BOARD_H
32#define __INCLUDED_H2_P2_DBH_BOARD_H
33
wdenka56bd922004-06-06 23:13:55 +000034#include <asm/arch/sizes.h>
35
wdenka56bd922004-06-06 23:13:55 +000036/*
37 * The Debug board is designed to function with the P2 Sample, H2
wdenk1eaeb582004-06-08 00:22:43 +000038 * Sample and 1610 Innovator boards. The main difference AFAICT is
wdenka56bd922004-06-06 23:13:55 +000039 * the chip selects used with each system ;
40 *
41 * P2 Sample : CS1 of OMAP730 is used to select the CPLD & LAN regs
42 * H2 Sample : CS1a is used to select the CPLD registers.
43 *
44 */
45
wdenka56bd922004-06-06 23:13:55 +000046/***************************************************************************
47 * CPLD Registers
48 **************************************************************************/
49
50#define H2DBG_CPLD_REVISION 0x04000010
51#define H2DBG_BOARD_REVISION 0x04000012
52#define H2DBG_GPIO_REGISTER 0x04000014
53#define H2DBG_LED_CONTROL 0x04000016
54#define H2DBG_MISC_INPUT 0x04000018
55#define H2DBG_LAN_STATUS 0x0400001A
56#define H2DBG_LAN_RESET 0x0400001C
57#define H2DBG_ETH_REG_BASE 0x04000300
58
wdenka56bd922004-06-06 23:13:55 +000059/***************************************************************************
60 * Ethernet Control Registers
61 * These are for the LAN91C96 on the debug board
62 **************************************************************************/
63
64/* Bank 0 in IO space */
65
66#define ETH_TCR (H2DBG_ETH_REG_BASE + 0x00) /* Transmit Control Register */
67#define ETH_EPH_STATUS (H2DBG_ETH_REG_BASE + 0x02) /* EPH Status Register */
68#define ETH_RCR (H2DBG_ETH_REG_BASE + 0x04) /* Receive Control Register */
69#define ETH_COUNTER (H2DBG_ETH_REG_BASE + 0x06) /* Counter Register */
70#define ETH_MIR (H2DBG_ETH_REG_BASE + 0x08) /* Memory Information Register */
71#define ETH_MCR (H2DBG_ETH_REG_BASE + 0x0A) /* Memory Configuration Register */
72
73/* Bank 1 in IO space */
74
75#define ETH_CONFIG (H2DBG_ETH_REG_BASE + 0x00) /* Configuration Register */
76#define ETH_BASE (H2DBG_ETH_REG_BASE + 0x02) /* Base Address Register */
77#define ETH_IA0 (H2DBG_ETH_REG_BASE + 0x04) /* Individual Address Register - 0 */
78#define ETH_IA1 (H2DBG_ETH_REG_BASE + 0x05) /* Individual Address Register - 1 */
79#define ETH_IA2 (H2DBG_ETH_REG_BASE + 0x06) /* Individual Address Register - 2 */
80#define ETH_IA3 (H2DBG_ETH_REG_BASE + 0x07) /* Individual Address Register - 3 */
81#define ETH_IA4 (H2DBG_ETH_REG_BASE + 0x08) /* Individual Address Register - 4 */
82#define ETH_IA5 (H2DBG_ETH_REG_BASE + 0x09) /* Individual Address Register - 5 */
83#define ETH_GEN_PURPOSE (H2DBG_ETH_REG_BASE + 0x0A) /* General Address Registers */
84#define ETH_CONTROL (H2DBG_ETH_REG_BASE + 0x0B) /* Control Register */
85
86/* Bank 2 in IO space */
87
88#define ETH_MMU (H2DBG_ETH_REG_BASE + 0x00) /* MMU Command Register */
89#define ETH_AUTO_TX_START (H2DBG_ETH_REG_BASE + 0x01) /* Auto Tx Start Register */
90#define ETH_PNR (H2DBG_ETH_REG_BASE + 0x02) /* Packet Number Register */
91#define ETH_ARR (H2DBG_ETH_REG_BASE + 0x03) /* Allocation Result Register */
92#define ETH_FIFO (H2DBG_ETH_REG_BASE + 0x04) /* FIFO Ports Register */
93#define ETH_POINTER (H2DBG_ETH_REG_BASE + 0x06) /* Pointer Register */
94#define ETH_DATA_HIGH (H2DBG_ETH_REG_BASE + 0x08) /* Data High Register */
95#define ETH_DATA_LOW (H2DBG_ETH_REG_BASE + 0x0A) /* Data Low Register */
96#define ETH_INT_STATS (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Status Register - RO */
97#define ETH_INT_ACK (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Acknowledge Register -WO */
98#define ETH_INT_MASK (H2DBG_ETH_REG_BASE + 0x0D) /* Interrupt Mask Register */
99
100
101#ifndef __ASSEMBLY__
102
103/*
wdenk1eaeb582004-06-08 00:22:43 +0000104 * A couple of utility inlines to aid debugging using the LED's on the
wdenka56bd922004-06-06 23:13:55 +0000105 * debug board.
106 */
107
108static inline void set_led_state(int state)
109{
110 static unsigned long hw_led_state = 0;
wdenk39539882004-07-01 16:30:44 +0000111 volatile unsigned short *led_address = (volatile unsigned short *)0x04000016;
wdenka56bd922004-06-06 23:13:55 +0000112
113 hw_led_state = ((unsigned long)state);
114 *((unsigned short *) (led_address)) = (unsigned short) (~hw_led_state & 0xFFFF);
115}
116
117
wdenk39539882004-07-01 16:30:44 +0000118static inline void spin_up_leds(void)
wdenk1eaeb582004-06-08 00:22:43 +0000119{
wdenka56bd922004-06-06 23:13:55 +0000120 volatile int i, j, k;
121
122 for (k = 0; k < 2; k++) {
123 for (i = 0; i < 16; i++) {
124 for (j = 0; j < 5000; j++) {
125 set_led_state(1 << i);
126 }
127 }
128 for (i = 15; i >= 0; i--) {
129 for (j = 0; j < 5000; j++) {
130 set_led_state(1 << i);
131 }
132 }
133 }
134}
135
136#endif /* ! __ASSEMBLY__ */
137
138#endif /* ! __INCLUDED_H2_P2_DBH_BOARD_H */