blob: 6fae03c1af5c2208e590fcf2cf8e3f32d96b52e1 [file] [log] [blame]
Michal Simek84c72042015-01-15 10:01:51 +01001/*
2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <asm/arch/hardware.h>
10#include <asm/arch/sys_proto.h>
11#include <asm/io.h>
12
13#define ZYNQ_SILICON_VER_MASK 0xF000
14#define ZYNQ_SILICON_VER_SHIFT 12
15
16DECLARE_GLOBAL_DATA_PTR;
17
18unsigned int zynqmp_get_silicon_version(void)
19{
20 gd->cpu_clk = get_tbclk();
21
22 switch (gd->cpu_clk) {
23 case 50000000:
24 return ZYNQMP_CSU_VERSION_QEMU;
25 }
26
27 return ZYNQMP_CSU_VERSION_EP108;
28}