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Stefano Babiceae49882011-01-20 08:05:15 +00001/*
2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7 *
8 * Configuration for the MX35pdk Freescale board.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#include <asm/arch/imx-regs.h>
30
31 /* High Level Configuration Options */
32#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
33#define CONFIG_MX35
34#define CONFIG_MX35_HCLK_FREQ 24000000
35
36#define CONFIG_DISPLAY_CPUINFO
37#define CONFIG_DISPLAY_BOARDINFO
38
39/* Set TEXT at the beginning of the NOR flash */
40#define CONFIG_SYS_TEXT_BASE 0xA0000000
41
42#define CONFIG_SYS_64BIT_VSPRINTF
43
44#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raiger9660e442011-10-20 04:19:47 +000045#define CONFIG_BOARD_LATE_INIT
Stefano Babiceae49882011-01-20 08:05:15 +000046
47#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48#define CONFIG_REVISION_TAG
49#define CONFIG_SETUP_MEMORY_TAGS
50#define CONFIG_INITRD_TAG
51
52/*
53 * Size of malloc() pool
54 */
55#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
56
57/*
58 * Hardware drivers
59 */
60#define CONFIG_HARD_I2C
61#define CONFIG_I2C_MXC
62#define CONFIG_SYS_I2C_MX35_PORT1
63#define CONFIG_SYS_I2C_SPEED 100000
64#define CONFIG_SYS_I2C_SLAVE 0xfe
65#define CONFIG_MXC_SPI
Stefano Babica4adedd2011-08-21 11:00:32 +020066#define CONFIG_MXC_GPIO
Stefano Babiceae49882011-01-20 08:05:15 +000067
68
69/*
70 * PMIC Configs
71 */
Stefano Babic5213d6e2011-10-06 21:07:42 +020072#define CONFIG_PMIC
73#define CONFIG_PMIC_I2C
74#define CONFIG_PMIC_FSL
Stefano Babiceae49882011-01-20 08:05:15 +000075#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
76
77/*
78 * MFD MC9SDZ60
79 */
80#define CONFIG_FSL_MC9SDZ60
81#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
82
83/*
84 * UART (console)
85 */
86#define CONFIG_MXC_UART
87#define CONFIG_SYS_MX35_UART1
88
89/* allow to overwrite serial and ethaddr */
90#define CONFIG_ENV_OVERWRITE
91#define CONFIG_CONS_INDEX 1
92#define CONFIG_BAUDRATE 115200
93#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
94
95/*
96 * Command definition
97 */
98
99#include <config_cmd_default.h>
100
101#define CONFIG_CMD_PING
102#define CONFIG_CMD_DHCP
103#define CONFIG_BOOTP_SUBNETMASK
104#define CONFIG_BOOTP_GATEWAY
105#define CONFIG_BOOTP_DNS
106
107#define CONFIG_CMD_NAND
108
109#define CONFIG_CMD_I2C
110#define CONFIG_CMD_SPI
111#define CONFIG_CMD_MII
112#define CONFIG_CMD_NET
113#define CONFIG_NET_RETRY_COUNT 100
114
115#define CONFIG_BOOTDELAY 3
116
117#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
118
119/*
120 * Ethernet on the debug board (SMC911)
121 */
122#define CONFIG_SMC911X
123#define CONFIG_SMC911X_16_BIT 1
124#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
125
126#define CONFIG_HAS_ETH1
Stefano Babiceae49882011-01-20 08:05:15 +0000127#define CONFIG_ETHPRIME
128
129/*
130 * Ethernet on SOC (FEC)
131 */
132#define CONFIG_FEC_MXC
133#define IMX_FEC_BASE FEC_BASE_ADDR
134#define CONFIG_FEC_MXC_PHYADDR 0x1F
135
136#define CONFIG_MII
137#define CONFIG_DISCOVER_PHY
138
139#define CONFIG_ARP_TIMEOUT 200UL
140
141/*
142 * Miscellaneous configurable options
143 */
144#define CONFIG_SYS_LONGHELP /* undef to save memory */
145#define CONFIG_SYS_PROMPT "MX35 U-Boot > "
146#define CONFIG_CMDLINE_EDITING
147#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
148#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
149
150#define CONFIG_AUTO_COMPLETE
151#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
152/* Print Buffer Size */
153#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
154#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
155#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
156
157#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
158#define CONFIG_SYS_MEMTEST_END 0x10000
159
160#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
161
162#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
163
164#define CONFIG_SYS_HZ 1000
165
166
167/*
168 * Stack sizes
169 *
170 * The stack sizes are set up in start.S using the settings below
171 */
172#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
173
174/*
175 * Physical Memory Map
176 */
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200177#define CONFIG_NR_DRAM_BANKS 2
Stefano Babiceae49882011-01-20 08:05:15 +0000178#define PHYS_SDRAM_1 CSD0_BASE_ADDR
179#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200180#define PHYS_SDRAM_2 CSD1_BASE_ADDR
181#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babiceae49882011-01-20 08:05:15 +0000182
183#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
184#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
185#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
186#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
187 GENERATED_GBL_DATA_SIZE)
188#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
189 CONFIG_SYS_GBL_DATA_OFFSET)
190
191/*
192 * MTD Command for mtdparts
193 */
194#define CONFIG_CMD_MTDPARTS
195#define CONFIG_MTD_DEVICE
196#define CONFIG_FLASH_CFI_MTD
197#define CONFIG_MTD_PARTITIONS
198#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
199#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
200 "96m(root),8m(cfg),1938m(user);" \
201 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
202
203/*
204 * FLASH and environment organization
205 */
206#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
207#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
208#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
209/* Monitor at beginning of flash */
210#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
211#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
212
213#define CONFIG_ENV_SECT_SIZE (128 * 1024)
214#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
215
216/* Address and size of Redundant Environment Sector */
217#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
218#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
219
220#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
221 CONFIG_SYS_MONITOR_LEN)
222
223#define CONFIG_ENV_IS_IN_FLASH
224
225#if defined(CONFIG_FSL_ENV_IN_NAND)
226 #define CONFIG_ENV_IS_IN_NAND
227 #define CONFIG_ENV_OFFSET (1024 * 1024)
228#endif
229
230/*
231 * CFI FLASH driver setup
232 */
233#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
234#define CONFIG_FLASH_CFI_DRIVER
235
236/* A non-standard buffered write algorithm */
237#define CONFIG_FLASH_SPANSION_S29WS_N
238#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
239#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
240
241/*
242 * NAND FLASH driver setup
243 */
244#define CONFIG_NAND_MXC
245#define CONFIG_NAND_MXC_V1_1
246#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
247#define CONFIG_SYS_MAX_NAND_DEVICE 1
248#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
249#define CONFIG_MXC_NAND_HWECC
250#define CONFIG_SYS_NAND_LARGEPAGE
251
252/*
253 * Default environment and default scripts
254 * to update uboot and load kernel
255 */
256#define xstr(s) str(s)
257#define str(s) #s
258
259#define CONFIG_HOSTNAME "mx35pdk"
260#define CONFIG_EXTRA_ENV_SETTINGS \
261 "netdev=eth1\0" \
262 "ethprime=smc911x\0" \
263 "nfsargs=setenv bootargs root=/dev/nfs rw " \
264 "nfsroot=${serverip}:${rootpath}\0" \
265 "ramargs=setenv bootargs root=/dev/ram rw\0" \
266 "addip_sta=setenv bootargs ${bootargs} " \
267 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
268 ":${hostname}:${netdev}:off panic=1\0" \
269 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
270 "addip=if test -n ${ipdyn};then run addip_dyn;" \
271 "else run addip_sta;fi\0" \
272 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
273 "addtty=setenv bootargs ${bootargs}" \
274 " console=ttymxc0,${baudrate}\0" \
275 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
276 "loadaddr=80800000\0" \
277 "kernel_addr_r=80800000\0" \
278 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
279 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
280 "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \
281 "flash_self=run ramargs addip addtty addmtd addmisc;" \
282 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
283 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
284 "bootm ${kernel_addr}\0" \
285 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
286 "run nfsargs addip addtty addmtd addmisc;" \
287 "bootm ${kernel_addr_r}\0" \
288 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
289 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
290 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
291 "load=tftp ${loadaddr} ${u-boot}\0" \
292 "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \
293 "update=protect off ${uboot_addr} +40000;" \
294 "erase ${uboot_addr} +40000;" \
295 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
296 "upd=if run load;then echo Updating u-boot;if run update;" \
297 "then echo U-Boot updated;" \
298 "else echo Error updating u-boot !;" \
299 "echo Board without bootloader !!;" \
300 "fi;" \
301 "else echo U-Boot not downloaded..exiting;fi\0" \
302 "bootcmd=run net_nfs\0"
303
304#endif /* __CONFIG_H */