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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Christophe Leroy53193a42017-07-07 10:16:42 +02002/*
3 * Copyright (C) 2010-2017 CS Systemes d'Information
4 * Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy53193a42017-07-07 10:16:42 +02005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
10/* High Level Configuration Options */
Christophe Leroy53193a42017-07-07 10:16:42 +020011#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
12
13#define CONFIG_EXTRA_ENV_SETTINGS \
14 "sdram_type=SDRAM\0" \
15 "flash_type=AM29LV160DB\0" \
16 "loadaddr=0x400000\0" \
17 "filename=uImage.lzma\0" \
18 "nfsroot=/opt/ofs\0" \
19 "dhcp_ip=ip=:::::eth0:dhcp\0" \
20 "console_args=console=ttyCPM0,115200N8\0" \
21 "flashboot=setenv bootargs " \
22 "${console_args} " \
23 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
24 "mcr3k:eth0:off;" \
25 "${ofl_args}; " \
26 "bootm 0x04060000 - 0x04050000\0" \
27 "tftpboot=setenv bootargs " \
28 "${console_args} " \
29 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
30 "mcr3k:eth0:off " \
31 "${ofl_args}; " \
32 "tftp ${loadaddr} ${filename};" \
33 "tftp 0xf00000 mcr3000.dtb;" \
34 "bootm ${loadaddr} - 0xf00000\0" \
35 "netboot=dhcp ${loadaddr} ${filename};" \
36 "tftp 0xf00000 mcr3000.dtb;" \
37 "setenv bootargs " \
38 "root=/dev/nfs rw " \
39 "${console_args} " \
40 "${dhcp_ip};" \
41 "bootm ${loadaddr} - 0xf00000\0" \
42 "nfsboot=setenv bootargs " \
43 "root=/dev/nfs rw nfsroot=${serverip}:${nfsroot} " \
44 "${console_args} " \
45 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
46 "mcr3k:eth0:off;" \
47 "bootm 0x04060000 - 0x04050000\0" \
48 "dhcpboot=dhcp ${loadaddr} ${filename};" \
49 "tftp 0xf00000 mcr3000.dtb;" \
50 "setenv bootargs " \
51 "${console_args} " \
52 "${dhcp_ip} " \
53 "${ofl_args}; " \
54 "bootm ${loadaddr} - 0xf00000\0"
55
Christophe Leroy53193a42017-07-07 10:16:42 +020056#define CONFIG_IPADDR 192.168.0.3
57#define CONFIG_SERVERIP 192.168.0.1
58#define CONFIG_NETMASK 255.0.0.0
59
Christophe Leroy53193a42017-07-07 10:16:42 +020060#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Christophe Leroy53193a42017-07-07 10:16:42 +020061
Christophe Leroy53193a42017-07-07 10:16:42 +020062/* Miscellaneous configurable options */
Christophe Leroy53193a42017-07-07 10:16:42 +020063
Christophe Leroy53193a42017-07-07 10:16:42 +020064#define CONFIG_SYS_MEMTEST_START 0x00002000
65#define CONFIG_SYS_MEMTEST_END 0x00800000
66
67#define CONFIG_SYS_LOAD_ADDR 0x200000
68
69#define CONFIG_SYS_HZ 1000
70
71/* Definitions for initial stack pointer and data area (in DPRAM) */
Christophe Leroyb3ede332018-03-16 17:20:51 +010072#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800)
73#define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800)
Christophe Leroy53193a42017-07-07 10:16:42 +020074
75/* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */
76#define CONFIG_SYS_SDRAM_BASE 0x00000000
Christophe Leroy53193a42017-07-07 10:16:42 +020077
78/* FLASH organization */
79#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
80#define CONFIG_SYS_FLASH_CFI 1
81#define CONFIG_FLASH_CFI_DRIVER 1
82#define CONFIG_SYS_MAX_FLASH_BANKS 1
83#define CONFIG_SYS_MAX_FLASH_SECT 35
84#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
85#define CONFIG_SYS_FLASH_WRITE_TOUT 500
86
87/*
88 * For booting Linux, the board info and command line data
89 * have to be in the first 8 MB of memory, since this is
90 * the maximum mapped by the Linux kernel during initialization.
91 */
92#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
Christophe Leroy0fb62202018-03-16 17:20:55 +010093#define CONFIG_SYS_MONITOR_LEN (320 << 10)
Christophe Leroy53193a42017-07-07 10:16:42 +020094#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
95#define CONFIG_SYS_MALLOC_LEN (4096 << 10)
96
97/* Environment Configuration */
98
99/* environment is in FLASH */
Christophe Leroy0fb62202018-03-16 17:20:55 +0100100#define CONFIG_ENV_SECT_SIZE 0x2000
101#define CONFIG_ENV_OFFSET 0x4000
Christophe Leroy53193a42017-07-07 10:16:42 +0200102#define CONFIG_ENV_OVERWRITE 1
103
Christophe Leroy53193a42017-07-07 10:16:42 +0200104/* Ethernet configuration part */
105#define CONFIG_SYS_DISCOVER_PHY 1
Christophe Leroy53193a42017-07-07 10:16:42 +0200106#define CONFIG_MII_INIT 1
Christophe Leroy53193a42017-07-07 10:16:42 +0200107
108/* NAND configuration part */
109#define CONFIG_SYS_MAX_NAND_DEVICE 1
110#define CONFIG_SYS_NAND_MAX_CHIPS 1
111#define CONFIG_SYS_NAND_BASE 0x0C000000
112
Christophe Leroy53193a42017-07-07 10:16:42 +0200113#endif /* __CONFIG_H */