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wdenk5d3207d2002-08-21 22:08:56 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Xilinx FPGA support
28 */
29
30#include <common.h>
31#include <virtex2.h>
32#include <spartan2.h>
Wolfgang Denk875c7892005-09-25 16:44:21 +020033#include <spartan3.h>
wdenk5d3207d2002-08-21 22:08:56 +000034
Matthias Fuchs01335022007-12-27 17:12:34 +010035#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
wdenk5d3207d2002-08-21 22:08:56 +000036
37#if 0
38#define FPGA_DEBUG
39#endif
40
41/* Define FPGA_DEBUG to get debug printf's */
42#ifdef FPGA_DEBUG
43#define PRINTF(fmt,args...) printf (fmt ,##args)
44#else
45#define PRINTF(fmt,args...)
46#endif
47
48/* Local Static Functions */
49static int xilinx_validate (Xilinx_desc * desc, char *fn);
50
51/* ------------------------------------------------------------------------- */
52
53int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
54{
55 int ret_val = FPGA_FAIL; /* assume a failure */
56
Wolfgang Denk77ddac92005-10-13 16:45:02 +020057 if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
wdenk5d3207d2002-08-21 22:08:56 +000058 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
59 } else
60 switch (desc->family) {
61 case Xilinx_Spartan2:
Matthias Fuchs01335022007-12-27 17:12:34 +010062#if defined(CONFIG_FPGA_SPARTAN2)
wdenk5d3207d2002-08-21 22:08:56 +000063 PRINTF ("%s: Launching the Spartan-II Loader...\n",
64 __FUNCTION__);
65 ret_val = Spartan2_load (desc, buf, bsize);
66#else
67 printf ("%s: No support for Spartan-II devices.\n",
68 __FUNCTION__);
69#endif
70 break;
Wolfgang Denk875c7892005-09-25 16:44:21 +020071 case Xilinx_Spartan3:
Matthias Fuchs01335022007-12-27 17:12:34 +010072#if defined(CONFIG_FPGA_SPARTAN3)
Wolfgang Denk875c7892005-09-25 16:44:21 +020073 PRINTF ("%s: Launching the Spartan-III Loader...\n",
74 __FUNCTION__);
75 ret_val = Spartan3_load (desc, buf, bsize);
76#else
77 printf ("%s: No support for Spartan-III devices.\n",
78 __FUNCTION__);
79#endif
80 break;
wdenk5d3207d2002-08-21 22:08:56 +000081 case Xilinx_Virtex2:
Matthias Fuchs01335022007-12-27 17:12:34 +010082#if defined(CONFIG_FPGA_VIRTEX2)
wdenk5d3207d2002-08-21 22:08:56 +000083 PRINTF ("%s: Launching the Virtex-II Loader...\n",
84 __FUNCTION__);
85 ret_val = Virtex2_load (desc, buf, bsize);
86#else
87 printf ("%s: No support for Virtex-II devices.\n",
88 __FUNCTION__);
89#endif
90 break;
91
92 default:
93 printf ("%s: Unsupported family type, %d\n",
94 __FUNCTION__, desc->family);
95 }
96
97 return ret_val;
98}
99
100int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
101{
102 int ret_val = FPGA_FAIL; /* assume a failure */
103
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200104 if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
wdenk5d3207d2002-08-21 22:08:56 +0000105 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
106 } else
107 switch (desc->family) {
108 case Xilinx_Spartan2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100109#if defined(CONFIG_FPGA_SPARTAN2)
wdenk5d3207d2002-08-21 22:08:56 +0000110 PRINTF ("%s: Launching the Spartan-II Reader...\n",
111 __FUNCTION__);
112 ret_val = Spartan2_dump (desc, buf, bsize);
113#else
114 printf ("%s: No support for Spartan-II devices.\n",
115 __FUNCTION__);
116#endif
117 break;
Wolfgang Denk875c7892005-09-25 16:44:21 +0200118 case Xilinx_Spartan3:
Matthias Fuchs01335022007-12-27 17:12:34 +0100119#if defined(CONFIG_FPGA_SPARTAN3)
Wolfgang Denk875c7892005-09-25 16:44:21 +0200120 PRINTF ("%s: Launching the Spartan-III Reader...\n",
121 __FUNCTION__);
122 ret_val = Spartan3_dump (desc, buf, bsize);
123#else
124 printf ("%s: No support for Spartan-III devices.\n",
125 __FUNCTION__);
126#endif
127 break;
wdenk5d3207d2002-08-21 22:08:56 +0000128 case Xilinx_Virtex2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100129#if defined( CONFIG_FPGA_VIRTEX2)
wdenk5d3207d2002-08-21 22:08:56 +0000130 PRINTF ("%s: Launching the Virtex-II Reader...\n",
131 __FUNCTION__);
132 ret_val = Virtex2_dump (desc, buf, bsize);
133#else
134 printf ("%s: No support for Virtex-II devices.\n",
135 __FUNCTION__);
136#endif
137 break;
138
139 default:
140 printf ("%s: Unsupported family type, %d\n",
141 __FUNCTION__, desc->family);
142 }
143
144 return ret_val;
145}
146
147int xilinx_info (Xilinx_desc * desc)
148{
149 int ret_val = FPGA_FAIL;
150
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200151 if (xilinx_validate (desc, (char *)__FUNCTION__)) {
wdenk5d3207d2002-08-21 22:08:56 +0000152 printf ("Family: \t");
153 switch (desc->family) {
154 case Xilinx_Spartan2:
155 printf ("Spartan-II\n");
156 break;
Wolfgang Denk875c7892005-09-25 16:44:21 +0200157 case Xilinx_Spartan3:
158 printf ("Spartan-III\n");
159 break;
wdenk5d3207d2002-08-21 22:08:56 +0000160 case Xilinx_Virtex2:
161 printf ("Virtex-II\n");
162 break;
163 /* Add new family types here */
164 default:
165 printf ("Unknown family type, %d\n", desc->family);
166 }
167
168 printf ("Interface type:\t");
169 switch (desc->iface) {
170 case slave_serial:
171 printf ("Slave Serial\n");
172 break;
173 case master_serial: /* Not used */
174 printf ("Master Serial\n");
175 break;
176 case slave_parallel:
177 printf ("Slave Parallel\n");
178 break;
179 case jtag_mode: /* Not used */
180 printf ("JTAG Mode\n");
181 break;
182 case slave_selectmap:
183 printf ("Slave SelectMap Mode\n");
184 break;
185 case master_selectmap:
186 printf ("Master SelectMap Mode\n");
187 break;
188 /* Add new interface types here */
189 default:
190 printf ("Unsupported interface type, %d\n", desc->iface);
191 }
192
193 printf ("Device Size: \t%d bytes\n"
194 "Cookie: \t0x%x (%d)\n",
195 desc->size, desc->cookie, desc->cookie);
196
197 if (desc->iface_fns) {
198 printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
199 switch (desc->family) {
200 case Xilinx_Spartan2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100201#if defined(CONFIG_FPGA_SPARTAN2)
wdenk5d3207d2002-08-21 22:08:56 +0000202 Spartan2_info (desc);
203#else
204 /* just in case */
205 printf ("%s: No support for Spartan-II devices.\n",
206 __FUNCTION__);
207#endif
208 break;
Wolfgang Denk875c7892005-09-25 16:44:21 +0200209 case Xilinx_Spartan3:
Matthias Fuchs01335022007-12-27 17:12:34 +0100210#if defined(CONFIG_FPGA_SPARTAN3)
Wolfgang Denk875c7892005-09-25 16:44:21 +0200211 Spartan3_info (desc);
212#else
213 /* just in case */
214 printf ("%s: No support for Spartan-III devices.\n",
215 __FUNCTION__);
216#endif
217 break;
wdenk5d3207d2002-08-21 22:08:56 +0000218 case Xilinx_Virtex2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100219#if defined(CONFIG_FPGA_VIRTEX2)
wdenk5d3207d2002-08-21 22:08:56 +0000220 Virtex2_info (desc);
221#else
222 /* just in case */
223 printf ("%s: No support for Virtex-II devices.\n",
224 __FUNCTION__);
225#endif
226 break;
227 /* Add new family types here */
228 default:
229 /* we don't need a message here - we give one up above */
wdenka8c7c702003-12-06 19:49:23 +0000230 ;
wdenk5d3207d2002-08-21 22:08:56 +0000231 }
232 } else
233 printf ("No Device Function Table.\n");
234
235 ret_val = FPGA_SUCCESS;
236 } else {
237 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
238 }
239
240 return ret_val;
241}
242
243int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
244{
245 int ret_val = FPGA_FAIL; /* assume a failure */
246
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200247 if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
wdenk5d3207d2002-08-21 22:08:56 +0000248 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
249 } else
250 switch (desc->family) {
251 case Xilinx_Spartan2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100252#if defined(CONFIG_FPGA_SPARTAN2)
wdenk5d3207d2002-08-21 22:08:56 +0000253 ret_val = Spartan2_reloc (desc, reloc_offset);
254#else
255 printf ("%s: No support for Spartan-II devices.\n",
256 __FUNCTION__);
257#endif
258 break;
Wolfgang Denk875c7892005-09-25 16:44:21 +0200259 case Xilinx_Spartan3:
Matthias Fuchs01335022007-12-27 17:12:34 +0100260#if defined(CONFIG_FPGA_SPARTAN3)
Wolfgang Denk875c7892005-09-25 16:44:21 +0200261 ret_val = Spartan3_reloc (desc, reloc_offset);
262#else
263 printf ("%s: No support for Spartan-III devices.\n",
264 __FUNCTION__);
265#endif
266 break;
wdenk5d3207d2002-08-21 22:08:56 +0000267 case Xilinx_Virtex2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100268#if defined(CONFIG_FPGA_VIRTEX2)
wdenk5d3207d2002-08-21 22:08:56 +0000269 ret_val = Virtex2_reloc (desc, reloc_offset);
270#else
271 printf ("%s: No support for Virtex-II devices.\n",
272 __FUNCTION__);
273#endif
274 break;
275 /* Add new family types here */
276 default:
277 printf ("%s: Unsupported family type, %d\n",
278 __FUNCTION__, desc->family);
279 }
280
281 return ret_val;
282}
283
284
285/* ------------------------------------------------------------------------- */
286
287static int xilinx_validate (Xilinx_desc * desc, char *fn)
288{
289 int ret_val = FALSE;
290
291 if (desc) {
292 if ((desc->family > min_xilinx_type) &&
293 (desc->family < max_xilinx_type)) {
294 if ((desc->iface > min_xilinx_iface_type) &&
295 (desc->iface < max_xilinx_iface_type)) {
296 if (desc->size) {
297 ret_val = TRUE;
298 } else
299 printf ("%s: NULL part size\n", fn);
300 } else
301 printf ("%s: Invalid Interface type, %d\n",
302 fn, desc->iface);
303 } else
304 printf ("%s: Invalid family type, %d\n", fn, desc->family);
305 } else
306 printf ("%s: NULL descriptor!\n", fn);
307
308 return ret_val;
309}
310
Matthias Fuchs01335022007-12-27 17:12:34 +0100311#endif /* CONFIG_FPGA && CONFIG_FPGA_XILINX */