Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 1 | /* |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 2 | * AXP221 and AXP223 driver |
| 3 | * |
| 4 | * IMPORTANT when making changes to this file check that the registers |
| 5 | * used are the same for the axp221 and axp223. |
| 6 | * |
| 7 | * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 8 | * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #include <common.h> |
| 14 | #include <errno.h> |
Paul Kocialkowski | f7c7ab6 | 2015-03-22 18:07:09 +0100 | [diff] [blame] | 15 | #include <asm/arch/gpio.h> |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 16 | #include <asm/arch/pmic_bus.h> |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 17 | #include <axp221.h> |
| 18 | |
| 19 | static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div) |
| 20 | { |
| 21 | if (mvolt < min) |
| 22 | mvolt = min; |
| 23 | else if (mvolt > max) |
| 24 | mvolt = max; |
| 25 | |
| 26 | return (mvolt - min) / div; |
| 27 | } |
| 28 | |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 29 | int axp221_set_dcdc1(unsigned int mvolt) |
| 30 | { |
| 31 | int ret; |
| 32 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100); |
| 33 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 34 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 35 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 36 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 37 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 38 | ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 39 | if (ret) |
| 40 | return ret; |
| 41 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 42 | ret = pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 43 | AXP221_OUTPUT_CTRL2_DCDC1SW_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 44 | if (ret) |
| 45 | return ret; |
| 46 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 47 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 48 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 49 | } |
| 50 | |
| 51 | int axp221_set_dcdc2(unsigned int mvolt) |
| 52 | { |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 53 | int ret; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 54 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 55 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 56 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 57 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 58 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 59 | |
| 60 | ret = pmic_bus_write(AXP221_DCDC2_CTRL, cfg); |
| 61 | if (ret) |
| 62 | return ret; |
| 63 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 64 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 65 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | int axp221_set_dcdc3(unsigned int mvolt) |
| 69 | { |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 70 | int ret; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 71 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20); |
| 72 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 73 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 74 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 75 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 76 | |
| 77 | ret = pmic_bus_write(AXP221_DCDC3_CTRL, cfg); |
| 78 | if (ret) |
| 79 | return ret; |
| 80 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 81 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 82 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 83 | } |
| 84 | |
| 85 | int axp221_set_dcdc4(unsigned int mvolt) |
| 86 | { |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 87 | int ret; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 88 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 89 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 90 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 91 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 92 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 93 | |
| 94 | ret = pmic_bus_write(AXP221_DCDC4_CTRL, cfg); |
| 95 | if (ret) |
| 96 | return ret; |
| 97 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 98 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 99 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 100 | } |
| 101 | |
| 102 | int axp221_set_dcdc5(unsigned int mvolt) |
| 103 | { |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 104 | int ret; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 105 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50); |
| 106 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 107 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 108 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 109 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 110 | |
| 111 | ret = pmic_bus_write(AXP221_DCDC5_CTRL, cfg); |
| 112 | if (ret) |
| 113 | return ret; |
| 114 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 115 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 116 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | int axp221_set_dldo1(unsigned int mvolt) |
| 120 | { |
| 121 | int ret; |
| 122 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 123 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 124 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 125 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 126 | AXP221_OUTPUT_CTRL2_DLDO1_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 127 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 128 | ret = pmic_bus_write(AXP221_DLDO1_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 129 | if (ret) |
| 130 | return ret; |
| 131 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 132 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 133 | AXP221_OUTPUT_CTRL2_DLDO1_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | int axp221_set_dldo2(unsigned int mvolt) |
| 137 | { |
| 138 | int ret; |
| 139 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 140 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 141 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 142 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 143 | AXP221_OUTPUT_CTRL2_DLDO2_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 144 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 145 | ret = pmic_bus_write(AXP221_DLDO2_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 146 | if (ret) |
| 147 | return ret; |
| 148 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 149 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 150 | AXP221_OUTPUT_CTRL2_DLDO2_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 151 | } |
| 152 | |
| 153 | int axp221_set_dldo3(unsigned int mvolt) |
| 154 | { |
| 155 | int ret; |
| 156 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 157 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 158 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 159 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 160 | AXP221_OUTPUT_CTRL2_DLDO3_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 161 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 162 | ret = pmic_bus_write(AXP221_DLDO3_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 163 | if (ret) |
| 164 | return ret; |
| 165 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 166 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 167 | AXP221_OUTPUT_CTRL2_DLDO3_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | int axp221_set_dldo4(unsigned int mvolt) |
| 171 | { |
| 172 | int ret; |
| 173 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 174 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 175 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 176 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 177 | AXP221_OUTPUT_CTRL2_DLDO4_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 178 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 179 | ret = pmic_bus_write(AXP221_DLDO4_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 180 | if (ret) |
| 181 | return ret; |
| 182 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 183 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 184 | AXP221_OUTPUT_CTRL2_DLDO4_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 185 | } |
| 186 | |
| 187 | int axp221_set_aldo1(unsigned int mvolt) |
| 188 | { |
| 189 | int ret; |
| 190 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 191 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 192 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 193 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 194 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 195 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 196 | ret = pmic_bus_write(AXP221_ALDO1_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 197 | if (ret) |
| 198 | return ret; |
| 199 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 200 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 201 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 202 | } |
| 203 | |
| 204 | int axp221_set_aldo2(unsigned int mvolt) |
| 205 | { |
| 206 | int ret; |
| 207 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 208 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 209 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 210 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 211 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 212 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 213 | ret = pmic_bus_write(AXP221_ALDO2_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 214 | if (ret) |
| 215 | return ret; |
| 216 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 217 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 218 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 219 | } |
| 220 | |
| 221 | int axp221_set_aldo3(unsigned int mvolt) |
| 222 | { |
| 223 | int ret; |
| 224 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 225 | |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 226 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 227 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL3, |
| 228 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Hans de Goede | 50e0d5e | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 229 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 230 | ret = pmic_bus_write(AXP221_ALDO3_CTRL, cfg); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 231 | if (ret) |
| 232 | return ret; |
| 233 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 234 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL3, |
| 235 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 236 | } |
| 237 | |
Siarhei Siamashka | 6906df1 | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 238 | int axp221_set_eldo(int eldo_num, unsigned int mvolt) |
| 239 | { |
| 240 | int ret; |
| 241 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 242 | u8 addr, bits; |
| 243 | |
| 244 | switch (eldo_num) { |
| 245 | case 3: |
| 246 | addr = AXP221_ELDO3_CTRL; |
| 247 | bits = AXP221_OUTPUT_CTRL2_ELDO3_EN; |
| 248 | break; |
| 249 | case 2: |
| 250 | addr = AXP221_ELDO2_CTRL; |
| 251 | bits = AXP221_OUTPUT_CTRL2_ELDO2_EN; |
| 252 | break; |
| 253 | case 1: |
| 254 | addr = AXP221_ELDO1_CTRL; |
| 255 | bits = AXP221_OUTPUT_CTRL2_ELDO1_EN; |
| 256 | break; |
| 257 | default: |
| 258 | return -EINVAL; |
| 259 | } |
| 260 | |
| 261 | if (mvolt == 0) |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 262 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, bits); |
Siarhei Siamashka | 6906df1 | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 263 | |
| 264 | ret = pmic_bus_write(addr, cfg); |
| 265 | if (ret) |
| 266 | return ret; |
| 267 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 268 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, bits); |
Siarhei Siamashka | 6906df1 | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 269 | } |
| 270 | |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 271 | int axp221_init(void) |
| 272 | { |
Hans de Goede | 3c78119 | 2015-01-11 19:43:56 +0100 | [diff] [blame] | 273 | /* This cannot be 0 because it is used in SPL before BSS is ready */ |
| 274 | static int needs_init = 1; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 275 | u8 axp_chip_id; |
| 276 | int ret; |
| 277 | |
Hans de Goede | 3c78119 | 2015-01-11 19:43:56 +0100 | [diff] [blame] | 278 | if (!needs_init) |
| 279 | return 0; |
| 280 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 281 | ret = pmic_bus_init(); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 282 | if (ret) |
| 283 | return ret; |
| 284 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 285 | ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 286 | if (ret) |
| 287 | return ret; |
| 288 | |
| 289 | if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) |
| 290 | return -ENODEV; |
| 291 | |
Hans de Goede | 3c78119 | 2015-01-11 19:43:56 +0100 | [diff] [blame] | 292 | needs_init = 0; |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 293 | return 0; |
| 294 | } |
Hans de Goede | f3fba56 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 295 | |
| 296 | int axp221_get_sid(unsigned int *sid) |
| 297 | { |
| 298 | u8 *dest = (u8 *)sid; |
| 299 | int i, ret; |
| 300 | |
| 301 | ret = axp221_init(); |
| 302 | if (ret) |
| 303 | return ret; |
| 304 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 305 | ret = pmic_bus_write(AXP221_PAGE, 1); |
Hans de Goede | f3fba56 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 306 | if (ret) |
| 307 | return ret; |
| 308 | |
| 309 | for (i = 0; i < 16; i++) { |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 310 | ret = pmic_bus_read(AXP221_SID + i, &dest[i]); |
Hans de Goede | f3fba56 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 311 | if (ret) |
| 312 | return ret; |
| 313 | } |
| 314 | |
Hans de Goede | bdcdf84 | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 315 | pmic_bus_write(AXP221_PAGE, 0); |
Hans de Goede | f3fba56 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 316 | |
| 317 | for (i = 0; i < 4; i++) |
| 318 | sid[i] = be32_to_cpu(sid[i]); |
| 319 | |
| 320 | return 0; |
| 321 | } |