blob: edb4ca58ea575878dec69f71647366ca686bf177 [file] [log] [blame]
Masahiro Yamada81385812016-01-12 16:36:38 +09001menu "Clock"
2
Simon Glassf26c8a82015-06-23 15:39:15 -06003config CLK
4 bool "Enable clock driver support"
5 depends on DM
6 help
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
10 feed into other clocks in a tree structure, with multiplexers to
11 choose the source for each clock.
12
Masahiro Yamada05435892015-08-12 07:31:46 +090013config SPL_CLK
Simon Glassf26c8a82015-06-23 15:39:15 -060014 bool "Enable clock support in SPL"
Wenyou Yang0712b672017-07-31 15:21:57 +080015 depends on CLK && SPL && SPL_DM
Simon Glassf26c8a82015-06-23 15:39:15 -060016 help
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
19 SPL, enable this option. It might provide a cleaner interface to
20 setting up clocks within SPL, and allows the same drivers to be
21 used as U-Boot proper.
Masahiro Yamada81385812016-01-12 16:36:38 +090022
Philipp Tomsich7c819e72017-06-29 01:45:01 +020023config TPL_CLK
24 bool "Enable clock support in TPL"
25 depends on CLK && TPL_DM
26 help
27 The clock subsystem adds a small amount of overhead to the image.
28 If this is acceptable and you have a need to use clock drivers in
29 SPL, enable this option. It might provide a cleaner interface to
30 setting up clocks within TPL, and allows the same drivers to be
31 used as U-Boot proper.
32
Álvaro Fernández Rojas5357eb92017-05-07 20:13:01 +020033config CLK_BCM6345
34 bool "Clock controller driver for BCM6345"
35 depends on CLK && ARCH_BMIPS
36 default y
37 help
38 This clock driver adds support for enabling and disabling peripheral
39 clocks on BCM6345 SoCs. HW has no rate changing capabilities.
40
Paul Burtondd7c7492016-09-08 07:47:38 +010041config CLK_BOSTON
42 def_bool y if TARGET_BOSTON
43 depends on CLK
44 select REGMAP
45 select SYSCON
46 help
47 Enable this to support the clocks
48
Patrice Chotardf264e232017-11-15 13:14:48 +010049config CLK_STM32F
50 bool "Enable clock driver support for STM32F family"
51 depends on CLK && (STM32F7 || STM32F4)
52 default y
53 help
54 This clock driver adds support for RCC clock management
55 for STM32F4 and STM32F7 SoCs.
56
Eugeniy Paltseve80dac02017-12-10 21:20:08 +030057config CLK_HSDK
58 bool "Enable cgu clock driver for HSDK"
59 depends on CLK
60 help
61 Enable this to support the cgu clocks on Synopsys ARC HSDK
62
Stefan Herbrechtsmeier3a64b252017-01-17 16:27:29 +010063config CLK_ZYNQ
64 bool "Enable clock driver support for Zynq"
65 depends on CLK && ARCH_ZYNQ
66 default y
67 help
68 This clock driver adds support for clock realted settings for
69 Zynq platform.
70
Siva Durga Prasad Paladugu128ec1f2016-11-15 16:15:41 +053071config CLK_ZYNQMP
72 bool "Enable clock driver support for ZynqMP"
73 depends on ARCH_ZYNQMP
74 help
75 This clock driver adds support for clock realted settings for
76 ZynqMP platform.
77
Patrick Delaunaya6151912018-03-12 10:46:15 +010078config CLK_STM32MP1
79 bool "Enable RCC clock driver for STM32MP1"
80 depends on ARCH_STM32MP && CLK
81 default y
82 help
83 Enable the STM32 clock (RCC) driver. Enable support for
84 manipulating STM32MP1's on-SoC clocks.
85
Stephen Warrend9fd7002016-08-08 11:28:24 -060086source "drivers/clk/tegra/Kconfig"
Masahiro Yamada48264d92016-02-02 21:11:32 +090087source "drivers/clk/uniphier/Kconfig"
Thomas Abraham166097e2016-04-23 22:18:09 +053088source "drivers/clk/exynos/Kconfig"
Wenyou Yang9e5935c2016-07-20 17:55:12 +080089source "drivers/clk/at91/Kconfig"
Marek Vasut36c2ee42017-07-21 23:18:03 +020090source "drivers/clk/renesas/Kconfig"
Marek Behún82a248d2018-04-24 17:21:25 +020091source "drivers/clk/mvebu/Kconfig"
Masahiro Yamada48264d92016-02-02 21:11:32 +090092
Mario Sixf0bcbe62018-04-27 14:53:15 +020093config ICS8N3QV01
94 bool "Enable ICS8N3QV01 VCXO driver"
95 depends on CLK
96 help
97 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
98 Crystal Oscillator). The output frequency can be programmed via an
99 I2C interface.
100
Masahiro Yamada81385812016-01-12 16:36:38 +0900101endmenu