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wdenk80885a92004-02-26 23:46:20 +00001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
3 *
4 * (C) Copyright 2003-2004
Detlev Zundel792a09e2009-05-13 10:54:10 +02005 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
wdenk80885a92004-02-26 23:46:20 +00006 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
wdenk9d46ea42005-03-14 23:56:42 +000010 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
wdenk80885a92004-02-26 23:46:20 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk80885a92004-02-26 23:46:20 +000032 */
33/*
34 * IMPORTANT NOTES
35 * 1 - this driver is intended for use with USB Mass Storage Devices
36 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
37 */
38
39#include <common.h>
40
41#ifdef CONFIG_USB_OHCI
42
43#include <malloc.h>
44#include <usb.h>
45#include "usb_ohci.h"
46
47#include <mpc5xxx.h>
48
49#define OHCI_USE_NPS /* force NoPowerSwitching mode */
50#undef OHCI_VERBOSE_DEBUG /* not always helpful */
51#undef DEBUG
52#undef SHOW_INFO
53#undef OHCI_FILL_TRACE
54
55/* For initializing controller (mask in an HCFS mode too) */
56#define OHCI_CONTROL_INIT \
57 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
58
Wolfgang Denkd00ce092008-04-25 12:44:08 +020059#define readl(a) (*((volatile u32 *)(a)))
60#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
wdenk80885a92004-02-26 23:46:20 +000061
62#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
63
64#ifdef DEBUG
65#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
66#else
67#define dbg(format, arg...) do {} while(0)
68#endif /* DEBUG */
69#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
70#ifdef SHOW_INFO
71#define info(format, arg...) printf("INFO: " format "\n", ## arg)
72#else
73#define info(format, arg...) do {} while(0)
74#endif
75
76#define m16_swap(x) swap_16(x)
77#define m32_swap(x) swap_32(x)
78
wdenk80885a92004-02-26 23:46:20 +000079#define ohci_cpu_to_le16(x) (x)
80#define ohci_cpu_to_le32(x) (x)
wdenk80885a92004-02-26 23:46:20 +000081
82/* global ohci_t */
83static ohci_t gohci;
84/* this must be aligned to a 256 byte boundary */
85struct ohci_hcca ghcca[1];
86/* a pointer to the aligned storage */
87struct ohci_hcca *phcca;
88/* this allocates EDs for all possible endpoints */
89struct ohci_device ohci_dev;
90/* urb_priv */
91urb_priv_t urb_priv;
92/* RHSC flag */
93int got_rhsc;
94/* device which was disconnected */
95struct usb_device *devgone;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +020096/* flag guarding URB transation */
97int urb_finished = 0;
wdenk80885a92004-02-26 23:46:20 +000098
99/*-------------------------------------------------------------------------*/
100
101/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
102 * The erratum (#4) description is incorrect. AMD's workaround waits
103 * till some bits (mostly reserved) are clear; ok for all revs.
104 */
105#define OHCI_QUIRK_AMD756 0xabcd
106#define read_roothub(hc, register, mask) ({ \
107 u32 temp = readl (&hc->regs->roothub.register); \
108 if (hc->flags & OHCI_QUIRK_AMD756) \
109 while (temp & mask) \
110 temp = readl (&hc->regs->roothub.register); \
111 temp; })
112
113static u32 roothub_a (struct ohci *hc)
114 { return read_roothub (hc, a, 0xfc0fe000); }
115static inline u32 roothub_b (struct ohci *hc)
116 { return readl (&hc->regs->roothub.b); }
117static inline u32 roothub_status (struct ohci *hc)
118 { return readl (&hc->regs->roothub.status); }
119static u32 roothub_portstatus (struct ohci *hc, int i)
120 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
121
122
123/* forward declaration */
124static int hc_interrupt (void);
125static void
126td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
127 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
128
129/*-------------------------------------------------------------------------*
130 * URB support functions
131 *-------------------------------------------------------------------------*/
132
133/* free HCD-private data associated with this URB */
134
135static void urb_free_priv (urb_priv_t * urb)
136{
137 int i;
138 int last;
139 struct td * td;
140
141 last = urb->length - 1;
142 if (last >= 0) {
143 for (i = 0; i <= last; i++) {
144 td = urb->td[i];
145 if (td) {
146 td->usb_dev = NULL;
147 urb->td[i] = NULL;
148 }
149 }
150 }
151}
152
153/*-------------------------------------------------------------------------*/
154
155#ifdef DEBUG
156static int sohci_get_current_frame_number (struct usb_device * dev);
157
158/* debug| print the main components of an URB
159 * small: 0) header + data packets 1) just header */
160
161static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
162 int transfer_len, struct devrequest * setup, char * str, int small)
163{
164 urb_priv_t * purb = &urb_priv;
165
166 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
167 str,
168 sohci_get_current_frame_number (dev),
169 usb_pipedevice (pipe),
170 usb_pipeendpoint (pipe),
171 usb_pipeout (pipe)? 'O': 'I',
172 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
173 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
174 purb->actual_length,
175 transfer_len, dev->status);
176#ifdef OHCI_VERBOSE_DEBUG
177 if (!small) {
178 int i, len;
179
180 if (usb_pipecontrol (pipe)) {
181 printf (__FILE__ ": cmd(8):");
182 for (i = 0; i < 8 ; i++)
183 printf (" %02x", ((__u8 *) setup) [i]);
184 printf ("\n");
185 }
186 if (transfer_len > 0 && buffer) {
187 printf (__FILE__ ": data(%d/%d):",
188 purb->actual_length,
189 transfer_len);
190 len = usb_pipeout (pipe)?
191 transfer_len: purb->actual_length;
192 for (i = 0; i < 16 && i < len; i++)
193 printf (" %02x", ((__u8 *) buffer) [i]);
194 printf ("%s\n", i < len? "...": "");
195 }
196 }
197#endif
198}
199
200/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
201void ep_print_int_eds (ohci_t *ohci, char * str) {
202 int i, j;
203 __u32 * ed_p;
204 for (i= 0; i < 32; i++) {
205 j = 5;
206 ed_p = &(ohci->hcca->int_table [i]);
207 if (*ed_p == 0)
208 continue;
209 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
210 while (*ed_p != 0 && j--) {
211 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
212 printf (" ed: %4x;", ed->hwINFO);
213 ed_p = &ed->hwNextED;
214 }
215 printf ("\n");
216 }
217}
218
219static void ohci_dump_intr_mask (char *label, __u32 mask)
220{
221 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
222 label,
223 mask,
224 (mask & OHCI_INTR_MIE) ? " MIE" : "",
225 (mask & OHCI_INTR_OC) ? " OC" : "",
226 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
227 (mask & OHCI_INTR_FNO) ? " FNO" : "",
228 (mask & OHCI_INTR_UE) ? " UE" : "",
229 (mask & OHCI_INTR_RD) ? " RD" : "",
230 (mask & OHCI_INTR_SF) ? " SF" : "",
231 (mask & OHCI_INTR_WDH) ? " WDH" : "",
232 (mask & OHCI_INTR_SO) ? " SO" : ""
233 );
234}
235
236static void maybe_print_eds (char *label, __u32 value)
237{
238 ed_t *edp = (ed_t *)value;
239
240 if (value) {
241 dbg ("%s %08x", label, value);
242 dbg ("%08x", edp->hwINFO);
243 dbg ("%08x", edp->hwTailP);
244 dbg ("%08x", edp->hwHeadP);
245 dbg ("%08x", edp->hwNextED);
246 }
247}
248
249static char * hcfs2string (int state)
250{
251 switch (state) {
252 case OHCI_USB_RESET: return "reset";
253 case OHCI_USB_RESUME: return "resume";
254 case OHCI_USB_OPER: return "operational";
255 case OHCI_USB_SUSPEND: return "suspend";
256 }
257 return "?";
258}
259
260/* dump control and status registers */
261static void ohci_dump_status (ohci_t *controller)
262{
263 struct ohci_regs *regs = controller->regs;
264 __u32 temp;
265
266 temp = readl (&regs->revision) & 0xff;
267 if (temp != 0x10)
268 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
269
270 temp = readl (&regs->control);
271 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
272 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
273 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
274 (temp & OHCI_CTRL_IR) ? " IR" : "",
275 hcfs2string (temp & OHCI_CTRL_HCFS),
276 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
277 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
278 (temp & OHCI_CTRL_IE) ? " IE" : "",
279 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
280 temp & OHCI_CTRL_CBSR
281 );
282
283 temp = readl (&regs->cmdstatus);
284 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
285 (temp & OHCI_SOC) >> 16,
286 (temp & OHCI_OCR) ? " OCR" : "",
287 (temp & OHCI_BLF) ? " BLF" : "",
288 (temp & OHCI_CLF) ? " CLF" : "",
289 (temp & OHCI_HCR) ? " HCR" : ""
290 );
291
292 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
293 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
294
295 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
296
297 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
298 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
299
300 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
301 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
302
303 maybe_print_eds ("donehead", readl (&regs->donehead));
304}
305
306static void ohci_dump_roothub (ohci_t *controller, int verbose)
307{
308 __u32 temp, ndp, i;
309
310 temp = roothub_a (controller);
311 ndp = (temp & RH_A_NDP);
312
313 if (verbose) {
314 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
315 ((temp & RH_A_POTPGT) >> 24) & 0xff,
316 (temp & RH_A_NOCP) ? " NOCP" : "",
317 (temp & RH_A_OCPM) ? " OCPM" : "",
318 (temp & RH_A_DT) ? " DT" : "",
319 (temp & RH_A_NPS) ? " NPS" : "",
320 (temp & RH_A_PSM) ? " PSM" : "",
321 ndp
322 );
323 temp = roothub_b (controller);
324 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
325 temp,
326 (temp & RH_B_PPCM) >> 16,
327 (temp & RH_B_DR)
328 );
329 temp = roothub_status (controller);
330 dbg ("roothub.status: %08x%s%s%s%s%s%s",
331 temp,
332 (temp & RH_HS_CRWE) ? " CRWE" : "",
333 (temp & RH_HS_OCIC) ? " OCIC" : "",
334 (temp & RH_HS_LPSC) ? " LPSC" : "",
335 (temp & RH_HS_DRWE) ? " DRWE" : "",
336 (temp & RH_HS_OCI) ? " OCI" : "",
337 (temp & RH_HS_LPS) ? " LPS" : ""
338 );
339 }
340
341 for (i = 0; i < ndp; i++) {
342 temp = roothub_portstatus (controller, i);
343 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
344 i,
345 temp,
346 (temp & RH_PS_PRSC) ? " PRSC" : "",
347 (temp & RH_PS_OCIC) ? " OCIC" : "",
348 (temp & RH_PS_PSSC) ? " PSSC" : "",
349 (temp & RH_PS_PESC) ? " PESC" : "",
350 (temp & RH_PS_CSC) ? " CSC" : "",
351
352 (temp & RH_PS_LSDA) ? " LSDA" : "",
353 (temp & RH_PS_PPS) ? " PPS" : "",
354 (temp & RH_PS_PRS) ? " PRS" : "",
355 (temp & RH_PS_POCI) ? " POCI" : "",
356 (temp & RH_PS_PSS) ? " PSS" : "",
357
358 (temp & RH_PS_PES) ? " PES" : "",
359 (temp & RH_PS_CCS) ? " CCS" : ""
360 );
361 }
362}
363
364static void ohci_dump (ohci_t *controller, int verbose)
365{
366 dbg ("OHCI controller usb-%s state", controller->slot_name);
367
368 /* dumps some of the state we know about */
369 ohci_dump_status (controller);
370 if (verbose)
371 ep_print_int_eds (controller, "hcca");
372 dbg ("hcca frame #%04x", controller->hcca->frame_no);
373 ohci_dump_roothub (controller, 1);
374}
375
376
377#endif /* DEBUG */
378
379/*-------------------------------------------------------------------------*
380 * Interface functions (URB)
381 *-------------------------------------------------------------------------*/
382
383/* get a transfer request */
384
385int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
386 int transfer_len, struct devrequest *setup, int interval)
387{
388 ohci_t *ohci;
389 ed_t * ed;
390 urb_priv_t *purb_priv;
391 int i, size = 0;
392
393 ohci = &gohci;
394
395 /* when controller's hung, permit only roothub cleanup attempts
396 * such as powering down ports */
397 if (ohci->disabled) {
398 err("sohci_submit_job: EPIPE");
399 return -1;
400 }
401
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200402 /* if we have an unfinished URB from previous transaction let's
403 * fail and scream as quickly as possible so as not to corrupt
404 * further communication */
405 if (!urb_finished) {
406 err("sohci_submit_job: URB NOT FINISHED");
407 return -1;
408 }
409 /* we're about to begin a new transaction here so mark the URB unfinished */
410 urb_finished = 0;
411
wdenk80885a92004-02-26 23:46:20 +0000412 /* every endpoint has a ed, locate and fill it */
413 if (!(ed = ep_add_ed (dev, pipe))) {
414 err("sohci_submit_job: ENOMEM");
415 return -1;
416 }
417
418 /* for the private part of the URB we need the number of TDs (size) */
419 switch (usb_pipetype (pipe)) {
420 case PIPE_BULK: /* one TD for every 4096 Byte */
421 size = (transfer_len - 1) / 4096 + 1;
422 break;
423 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
424 size = (transfer_len == 0)? 2:
425 (transfer_len - 1) / 4096 + 3;
426 break;
427 }
428
429 if (size >= (N_URB_TD - 1)) {
430 err("need %d TDs, only have %d", size, N_URB_TD);
431 return -1;
432 }
433 purb_priv = &urb_priv;
434 purb_priv->pipe = pipe;
435
436 /* fill the private part of the URB */
437 purb_priv->length = size;
438 purb_priv->ed = ed;
439 purb_priv->actual_length = 0;
440
441 /* allocate the TDs */
442 /* note that td[0] was allocated in ep_add_ed */
443 for (i = 0; i < size; i++) {
444 purb_priv->td[i] = td_alloc (dev);
445 if (!purb_priv->td[i]) {
446 purb_priv->length = i;
447 urb_free_priv (purb_priv);
448 err("sohci_submit_job: ENOMEM");
449 return -1;
450 }
451 }
452
453 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
454 urb_free_priv (purb_priv);
455 err("sohci_submit_job: EINVAL");
456 return -1;
457 }
458
459 /* link the ed into a chain if is not already */
460 if (ed->state != ED_OPER)
461 ep_link (ohci, ed);
462
463 /* fill the TDs and link it to the ed */
464 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
465
466 return 0;
467}
468
469/*-------------------------------------------------------------------------*/
470
471#ifdef DEBUG
472/* tell us the current USB frame number */
473
474static int sohci_get_current_frame_number (struct usb_device *usb_dev)
475{
476 ohci_t *ohci = &gohci;
477
478 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
479}
480#endif
481
482/*-------------------------------------------------------------------------*
483 * ED handling functions
484 *-------------------------------------------------------------------------*/
485
486/* link an ed into one of the HC chains */
487
488static int ep_link (ohci_t *ohci, ed_t *edi)
489{
490 volatile ed_t *ed = edi;
491
492 ed->state = ED_OPER;
493
494 switch (ed->type) {
495 case PIPE_CONTROL:
496 ed->hwNextED = 0;
497 if (ohci->ed_controltail == NULL) {
498 writel (ed, &ohci->regs->ed_controlhead);
499 } else {
wdenk79d696f2004-03-11 22:46:36 +0000500 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk80885a92004-02-26 23:46:20 +0000501 }
502 ed->ed_prev = ohci->ed_controltail;
503 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
504 !ohci->ed_rm_list[1] && !ohci->sleeping) {
505 ohci->hc_control |= OHCI_CTRL_CLE;
506 writel (ohci->hc_control, &ohci->regs->control);
507 }
508 ohci->ed_controltail = edi;
509 break;
510
511 case PIPE_BULK:
512 ed->hwNextED = 0;
513 if (ohci->ed_bulktail == NULL) {
514 writel (ed, &ohci->regs->ed_bulkhead);
515 } else {
wdenk79d696f2004-03-11 22:46:36 +0000516 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk80885a92004-02-26 23:46:20 +0000517 }
518 ed->ed_prev = ohci->ed_bulktail;
519 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
520 !ohci->ed_rm_list[1] && !ohci->sleeping) {
521 ohci->hc_control |= OHCI_CTRL_BLE;
522 writel (ohci->hc_control, &ohci->regs->control);
523 }
524 ohci->ed_bulktail = edi;
525 break;
526 }
527 return 0;
528}
529
530/*-------------------------------------------------------------------------*/
531
532/* unlink an ed from one of the HC chains.
533 * just the link to the ed is unlinked.
534 * the link from the ed still points to another operational ed or 0
535 * so the HC can eventually finish the processing of the unlinked ed */
536
537static int ep_unlink (ohci_t *ohci, ed_t *edi)
538{
539 volatile ed_t *ed = edi;
540
541 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
542
543 switch (ed->type) {
544 case PIPE_CONTROL:
545 if (ed->ed_prev == NULL) {
546 if (!ed->hwNextED) {
547 ohci->hc_control &= ~OHCI_CTRL_CLE;
548 writel (ohci->hc_control, &ohci->regs->control);
549 }
550 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
551 } else {
552 ed->ed_prev->hwNextED = ed->hwNextED;
553 }
554 if (ohci->ed_controltail == ed) {
555 ohci->ed_controltail = ed->ed_prev;
556 } else {
557 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
558 }
559 break;
560
561 case PIPE_BULK:
562 if (ed->ed_prev == NULL) {
563 if (!ed->hwNextED) {
564 ohci->hc_control &= ~OHCI_CTRL_BLE;
565 writel (ohci->hc_control, &ohci->regs->control);
566 }
567 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
568 } else {
569 ed->ed_prev->hwNextED = ed->hwNextED;
570 }
571 if (ohci->ed_bulktail == ed) {
572 ohci->ed_bulktail = ed->ed_prev;
573 } else {
574 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
575 }
576 break;
577 }
578 ed->state = ED_UNLINK;
579 return 0;
580}
581
582
583/*-------------------------------------------------------------------------*/
584
585/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
586 * but the USB stack is a little bit stateless so we do it at every transaction
587 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
588 * in all other cases the state is left unchanged
589 * the ed info fields are setted anyway even though most of them should not change */
590
591static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
592{
593 td_t *td;
594 ed_t *ed_ret;
595 volatile ed_t *ed;
596
597 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
598 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
599
600 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
601 err("ep_add_ed: pending delete");
602 /* pending delete request */
603 return NULL;
604 }
605
606 if (ed->state == ED_NEW) {
607 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
608 /* dummy td; end of td list for ed */
609 td = td_alloc (usb_dev);
wdenk79d696f2004-03-11 22:46:36 +0000610 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
wdenk80885a92004-02-26 23:46:20 +0000611 ed->hwHeadP = ed->hwTailP;
612 ed->state = ED_UNLINK;
613 ed->type = usb_pipetype (pipe);
614 ohci_dev.ed_cnt++;
615 }
616
617 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
618 | usb_pipeendpoint (pipe) << 7
619 | (usb_pipeisoc (pipe)? 0x8000: 0)
620 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
621 | usb_pipeslow (pipe) << 13
622 | usb_maxpacket (usb_dev, pipe) << 16);
623
624 return ed_ret;
625}
626
627/*-------------------------------------------------------------------------*
628 * TD handling functions
629 *-------------------------------------------------------------------------*/
630
631/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
632
633static void td_fill (ohci_t *ohci, unsigned int info,
634 void *data, int len,
635 struct usb_device *dev, int index, urb_priv_t *urb_priv)
636{
637 volatile td_t *td, *td_pt;
638#ifdef OHCI_FILL_TRACE
639 int i;
640#endif
641
642 if (index > urb_priv->length) {
643 err("index > length");
644 return;
645 }
646 /* use this td as the next dummy */
647 td_pt = urb_priv->td [index];
648 td_pt->hwNextTD = 0;
649
650 /* fill the old dummy TD */
651 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
652
653 td->ed = urb_priv->ed;
654 td->next_dl_td = NULL;
655 td->index = index;
656 td->data = (__u32)data;
657#ifdef OHCI_FILL_TRACE
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200658 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
wdenk80885a92004-02-26 23:46:20 +0000659 for (i = 0; i < len; i++)
660 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
661 printf("\n");
662 }
663#endif
664 if (!len)
665 data = 0;
666
667 td->hwINFO = ohci_cpu_to_le32 (info);
wdenk79d696f2004-03-11 22:46:36 +0000668 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
wdenk80885a92004-02-26 23:46:20 +0000669 if (data)
wdenk79d696f2004-03-11 22:46:36 +0000670 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
wdenk80885a92004-02-26 23:46:20 +0000671 else
672 td->hwBE = 0;
wdenk79d696f2004-03-11 22:46:36 +0000673 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
wdenk80885a92004-02-26 23:46:20 +0000674
675 /* append to queue */
676 td->ed->hwTailP = td->hwNextTD;
677}
678
679/*-------------------------------------------------------------------------*/
680
681/* prepare all TDs of a transfer */
wdenk80885a92004-02-26 23:46:20 +0000682static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
683 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
684{
685 ohci_t *ohci = &gohci;
686 int data_len = transfer_len;
687 void *data;
688 int cnt = 0;
689 __u32 info = 0;
690 unsigned int toggle = 0;
691
692 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
693 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
694 toggle = TD_T_TOGGLE;
695 } else {
696 toggle = TD_T_DATA0;
697 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
698 }
699 urb->td_cnt = 0;
700 if (data_len)
701 data = buffer;
702 else
703 data = 0;
704
705 switch (usb_pipetype (pipe)) {
706 case PIPE_BULK:
707 info = usb_pipeout (pipe)?
708 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
709 while(data_len > 4096) {
710 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
711 data += 4096; data_len -= 4096; cnt++;
712 }
713 info = usb_pipeout (pipe)?
714 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
715 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
716 cnt++;
717
718 if (!ohci->sleeping)
719 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
720 break;
721
722 case PIPE_CONTROL:
723 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
724 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
725 if (data_len > 0) {
726 info = usb_pipeout (pipe)?
727 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
728 /* NOTE: mishandles transfers >8K, some >4K */
729 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
730 }
731 info = usb_pipeout (pipe)?
732 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
733 td_fill (ohci, info, data, 0, dev, cnt++, urb);
734 if (!ohci->sleeping)
735 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
736 break;
737 }
738 if (urb->length != cnt)
739 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
740}
741
742/*-------------------------------------------------------------------------*
743 * Done List handling functions
744 *-------------------------------------------------------------------------*/
745
746
747/* calculate the transfer length and update the urb */
748
749static void dl_transfer_length(td_t * td)
750{
Wolfgang Denka4421732011-11-04 15:55:10 +0000751 __u32 tdBE, tdCBP;
wdenk80885a92004-02-26 23:46:20 +0000752 urb_priv_t *lurb_priv = &urb_priv;
753
wdenk80885a92004-02-26 23:46:20 +0000754 tdBE = ohci_cpu_to_le32 (td->hwBE);
755 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
756
757
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200758 if (!(usb_pipecontrol(lurb_priv->pipe) &&
wdenk80885a92004-02-26 23:46:20 +0000759 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
760 if (tdBE != 0) {
761 if (td->hwCBP == 0)
762 lurb_priv->actual_length += tdBE - td->data + 1;
763 else
764 lurb_priv->actual_length += tdCBP - td->data;
765 }
766 }
767}
768
769/*-------------------------------------------------------------------------*/
770
771/* replies to the request have to be on a FIFO basis so
772 * we reverse the reversed done-list */
773
774static td_t * dl_reverse_done_list (ohci_t *ohci)
775{
776 __u32 td_list_hc;
777 td_t *td_rev = NULL;
778 td_t *td_list = NULL;
779 urb_priv_t *lurb_priv = NULL;
780
781 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
782 ohci->hcca->done_head = 0;
783
784 while (td_list_hc) {
785 td_list = (td_t *)td_list_hc;
786
787 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
788 lurb_priv = &urb_priv;
789 dbg(" USB-error/status: %x : %p",
790 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
791 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
792 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
793 td_list->ed->hwHeadP =
794 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
795 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
796 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
797 } else
798 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
799 }
wdenk80885a92004-02-26 23:46:20 +0000800 td_list->hwNextTD = 0;
wdenk80885a92004-02-26 23:46:20 +0000801 }
802
803 td_list->next_dl_td = td_rev;
804 td_rev = td_list;
805 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
806 }
807 return td_list;
808}
809
810/*-------------------------------------------------------------------------*/
811
812/* td done list */
813static int dl_done_list (ohci_t *ohci, td_t *td_list)
814{
815 td_t *td_list_next = NULL;
816 ed_t *ed;
817 int cc = 0;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200818 int stat = 0;
wdenk80885a92004-02-26 23:46:20 +0000819 /* urb_t *urb; */
820 urb_priv_t *lurb_priv;
821 __u32 tdINFO, edHeadP, edTailP;
822
823 while (td_list) {
824 td_list_next = td_list->next_dl_td;
825
826 lurb_priv = &urb_priv;
827 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
828
829 ed = td_list->ed;
830
831 dl_transfer_length(td_list);
832
833 /* error code of transfer */
834 cc = TD_CC_GET (tdINFO);
835 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
836 if ((ed->state & (ED_OPER | ED_UNLINK))
837 && (lurb_priv->state != URB_DEL)) {
838 dbg("ConditionCode %#x", cc);
839 stat = cc_to_error[cc];
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200840 urb_finished = 1;
wdenk80885a92004-02-26 23:46:20 +0000841 }
842 }
843
844 if (ed->state != ED_NEW) {
845 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
846 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
847
848 /* unlink eds if they are not busy */
849 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
850 ep_unlink (ohci, ed);
851 }
852
853 td_list = td_list_next;
854 }
855 return stat;
856}
857
858/*-------------------------------------------------------------------------*
859 * Virtual Root Hub
860 *-------------------------------------------------------------------------*/
861
862/* Device descriptor */
863static __u8 root_hub_dev_des[] =
864{
865 0x12, /* __u8 bLength; */
866 0x01, /* __u8 bDescriptorType; Device */
867 0x10, /* __u16 bcdUSB; v1.1 */
868 0x01,
869 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
870 0x00, /* __u8 bDeviceSubClass; */
871 0x00, /* __u8 bDeviceProtocol; */
872 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
873 0x00, /* __u16 idVendor; */
874 0x00,
875 0x00, /* __u16 idProduct; */
876 0x00,
877 0x00, /* __u16 bcdDevice; */
878 0x00,
879 0x00, /* __u8 iManufacturer; */
880 0x01, /* __u8 iProduct; */
881 0x00, /* __u8 iSerialNumber; */
882 0x01 /* __u8 bNumConfigurations; */
883};
884
885
886/* Configuration descriptor */
887static __u8 root_hub_config_des[] =
888{
889 0x09, /* __u8 bLength; */
890 0x02, /* __u8 bDescriptorType; Configuration */
891 0x19, /* __u16 wTotalLength; */
892 0x00,
893 0x01, /* __u8 bNumInterfaces; */
894 0x01, /* __u8 bConfigurationValue; */
895 0x00, /* __u8 iConfiguration; */
896 0x40, /* __u8 bmAttributes;
897 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
898 0x00, /* __u8 MaxPower; */
899
900 /* interface */
901 0x09, /* __u8 if_bLength; */
902 0x04, /* __u8 if_bDescriptorType; Interface */
903 0x00, /* __u8 if_bInterfaceNumber; */
904 0x00, /* __u8 if_bAlternateSetting; */
905 0x01, /* __u8 if_bNumEndpoints; */
906 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
907 0x00, /* __u8 if_bInterfaceSubClass; */
908 0x00, /* __u8 if_bInterfaceProtocol; */
909 0x00, /* __u8 if_iInterface; */
910
911 /* endpoint */
912 0x07, /* __u8 ep_bLength; */
913 0x05, /* __u8 ep_bDescriptorType; Endpoint */
914 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
915 0x03, /* __u8 ep_bmAttributes; Interrupt */
916 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
917 0x00,
918 0xff /* __u8 ep_bInterval; 255 ms */
919};
920
921static unsigned char root_hub_str_index0[] =
922{
923 0x04, /* __u8 bLength; */
924 0x03, /* __u8 bDescriptorType; String-descriptor */
925 0x09, /* __u8 lang ID */
926 0x04, /* __u8 lang ID */
927};
928
929static unsigned char root_hub_str_index1[] =
930{
931 28, /* __u8 bLength; */
932 0x03, /* __u8 bDescriptorType; String-descriptor */
933 'O', /* __u8 Unicode */
934 0, /* __u8 Unicode */
935 'H', /* __u8 Unicode */
936 0, /* __u8 Unicode */
937 'C', /* __u8 Unicode */
938 0, /* __u8 Unicode */
939 'I', /* __u8 Unicode */
940 0, /* __u8 Unicode */
941 ' ', /* __u8 Unicode */
942 0, /* __u8 Unicode */
943 'R', /* __u8 Unicode */
944 0, /* __u8 Unicode */
945 'o', /* __u8 Unicode */
946 0, /* __u8 Unicode */
947 'o', /* __u8 Unicode */
948 0, /* __u8 Unicode */
949 't', /* __u8 Unicode */
950 0, /* __u8 Unicode */
951 ' ', /* __u8 Unicode */
952 0, /* __u8 Unicode */
953 'H', /* __u8 Unicode */
954 0, /* __u8 Unicode */
955 'u', /* __u8 Unicode */
956 0, /* __u8 Unicode */
957 'b', /* __u8 Unicode */
958 0, /* __u8 Unicode */
959};
960
961/* Hub class-specific descriptor is constructed dynamically */
962
963
964/*-------------------------------------------------------------------------*/
965
966#define OK(x) len = (x); break
967#ifdef DEBUG
968#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
969#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
970#else
971#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
972#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
973#endif
974#define RD_RH_STAT roothub_status(&gohci)
975#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
976
977/* request to virtual root hub */
978
979int rh_check_port_status(ohci_t *controller)
980{
981 __u32 temp, ndp, i;
982 int res;
983
984 res = -1;
985 temp = roothub_a (controller);
986 ndp = (temp & RH_A_NDP);
987 for (i = 0; i < ndp; i++) {
988 temp = roothub_portstatus (controller, i);
989 /* check for a device disconnect */
990 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
991 (RH_PS_PESC | RH_PS_CSC)) &&
992 ((temp & RH_PS_CCS) == 0)) {
993 res = i;
994 break;
995 }
996 }
997 return res;
998}
999
1000static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1001 void *buffer, int transfer_len, struct devrequest *cmd)
1002{
1003 void * data = buffer;
1004 int leni = transfer_len;
1005 int len = 0;
1006 int stat = 0;
1007 __u32 datab[4];
1008 __u8 *data_buf = (__u8 *)datab;
1009 __u16 bmRType_bReq;
1010 __u16 wValue;
1011 __u16 wIndex;
1012 __u16 wLength;
1013
1014#ifdef DEBUG
1015urb_priv.actual_length = 0;
1016pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1017#endif
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001018 if (usb_pipeint(pipe)) {
wdenk80885a92004-02-26 23:46:20 +00001019 info("Root-Hub submit IRQ: NOT implemented");
1020 return 0;
1021 }
1022
1023 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1024 wValue = m16_swap (cmd->value);
1025 wIndex = m16_swap (cmd->index);
1026 wLength = m16_swap (cmd->length);
1027
1028 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1029 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1030
1031 switch (bmRType_bReq) {
1032 /* Request Destination:
1033 without flags: Device,
1034 RH_INTERFACE: interface,
1035 RH_ENDPOINT: endpoint,
1036 RH_CLASS means HUB here,
1037 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1038 */
1039
1040 case RH_GET_STATUS:
1041 *(__u16 *) data_buf = m16_swap (1); OK (2);
1042 case RH_GET_STATUS | RH_INTERFACE:
1043 *(__u16 *) data_buf = m16_swap (0); OK (2);
1044 case RH_GET_STATUS | RH_ENDPOINT:
1045 *(__u16 *) data_buf = m16_swap (0); OK (2);
1046 case RH_GET_STATUS | RH_CLASS:
1047 *(__u32 *) data_buf = m32_swap (
1048 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1049 OK (4);
1050 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1051 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1052
1053 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1054 switch (wValue) {
1055 case (RH_ENDPOINT_STALL): OK (0);
1056 }
1057 break;
1058
1059 case RH_CLEAR_FEATURE | RH_CLASS:
1060 switch (wValue) {
1061 case RH_C_HUB_LOCAL_POWER:
1062 OK(0);
1063 case (RH_C_HUB_OVER_CURRENT):
1064 WR_RH_STAT(RH_HS_OCIC); OK (0);
1065 }
1066 break;
1067
1068 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1069 switch (wValue) {
1070 case (RH_PORT_ENABLE):
1071 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1072 case (RH_PORT_SUSPEND):
1073 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1074 case (RH_PORT_POWER):
1075 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1076 case (RH_C_PORT_CONNECTION):
1077 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1078 case (RH_C_PORT_ENABLE):
1079 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1080 case (RH_C_PORT_SUSPEND):
1081 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1082 case (RH_C_PORT_OVER_CURRENT):
1083 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1084 case (RH_C_PORT_RESET):
1085 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1086 }
1087 break;
1088
1089 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1090 switch (wValue) {
1091 case (RH_PORT_SUSPEND):
1092 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1093 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1094 if (RD_RH_PORTSTAT & RH_PS_CCS)
1095 WR_RH_PORTSTAT (RH_PS_PRS);
1096 OK (0);
1097 case (RH_PORT_POWER):
1098 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1099 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1100 if (RD_RH_PORTSTAT & RH_PS_CCS)
1101 WR_RH_PORTSTAT (RH_PS_PES );
1102 OK (0);
1103 }
1104 break;
1105
1106 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1107
1108 case RH_GET_DESCRIPTOR:
1109 switch ((wValue & 0xff00) >> 8) {
1110 case (0x01): /* device descriptor */
1111 len = min_t(unsigned int,
1112 leni,
1113 min_t(unsigned int,
1114 sizeof (root_hub_dev_des),
1115 wLength));
1116 data_buf = root_hub_dev_des; OK(len);
1117 case (0x02): /* configuration descriptor */
1118 len = min_t(unsigned int,
1119 leni,
1120 min_t(unsigned int,
1121 sizeof (root_hub_config_des),
1122 wLength));
1123 data_buf = root_hub_config_des; OK(len);
1124 case (0x03): /* string descriptors */
1125 if(wValue==0x0300) {
1126 len = min_t(unsigned int,
1127 leni,
1128 min_t(unsigned int,
1129 sizeof (root_hub_str_index0),
1130 wLength));
1131 data_buf = root_hub_str_index0;
1132 OK(len);
1133 }
1134 if(wValue==0x0301) {
1135 len = min_t(unsigned int,
1136 leni,
1137 min_t(unsigned int,
1138 sizeof (root_hub_str_index1),
1139 wLength));
1140 data_buf = root_hub_str_index1;
1141 OK(len);
1142 }
1143 default:
1144 stat = USB_ST_STALLED;
1145 }
1146 break;
1147
1148 case RH_GET_DESCRIPTOR | RH_CLASS:
1149 {
1150 __u32 temp = roothub_a (&gohci);
1151
1152 data_buf [0] = 9; /* min length; */
1153 data_buf [1] = 0x29;
1154 data_buf [2] = temp & RH_A_NDP;
1155 data_buf [3] = 0;
1156 if (temp & RH_A_PSM) /* per-port power switching? */
1157 data_buf [3] |= 0x1;
1158 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1159 data_buf [3] |= 0x10;
1160 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1161 data_buf [3] |= 0x8;
1162
1163 /* corresponds to data_buf[4-7] */
1164 datab [1] = 0;
1165 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1166 temp = roothub_b (&gohci);
1167 data_buf [7] = temp & RH_B_DR;
1168 if (data_buf [2] < 7) {
1169 data_buf [8] = 0xff;
1170 } else {
1171 data_buf [0] += 2;
1172 data_buf [8] = (temp & RH_B_DR) >> 8;
1173 data_buf [10] = data_buf [9] = 0xff;
1174 }
1175
1176 len = min_t(unsigned int, leni,
1177 min_t(unsigned int, data_buf [0], wLength));
1178 OK (len);
1179 }
1180
1181 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1182
1183 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1184
1185 default:
1186 dbg ("unsupported root hub command");
1187 stat = USB_ST_STALLED;
1188 }
1189
1190#ifdef DEBUG
1191 ohci_dump_roothub (&gohci, 1);
1192#endif
1193
1194 len = min_t(int, len, leni);
1195 if (data != data_buf)
1196 memcpy (data, data_buf, len);
1197 dev->act_len = len;
1198 dev->status = stat;
1199
1200#ifdef DEBUG
1201 if (transfer_len)
1202 urb_priv.actual_length = transfer_len;
1203 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1204#endif
1205
1206 return stat;
1207}
1208
1209/*-------------------------------------------------------------------------*/
1210
1211/* common code for handling submit messages - used for all but root hub */
1212/* accesses. */
1213int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1214 int transfer_len, struct devrequest *setup, int interval)
1215{
1216 int stat = 0;
1217 int maxsize = usb_maxpacket(dev, pipe);
1218 int timeout;
1219
1220 /* device pulled? Shortcut the action. */
1221 if (devgone == dev) {
1222 dev->status = USB_ST_CRC_ERR;
1223 return 0;
1224 }
1225
1226#ifdef DEBUG
1227 urb_priv.actual_length = 0;
1228 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1229#endif
1230 if (!maxsize) {
1231 err("submit_common_message: pipesize for pipe %lx is zero",
1232 pipe);
1233 return -1;
1234 }
1235
1236 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1237 err("sohci_submit_job failed");
1238 return -1;
1239 }
1240
1241 /* allow more time for a BULK device to react - some are slow */
1242#define BULK_TO 5000 /* timeout in milliseconds */
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001243 if (usb_pipebulk(pipe))
wdenk80885a92004-02-26 23:46:20 +00001244 timeout = BULK_TO;
1245 else
1246 timeout = 100;
1247
1248 /* wait for it to complete */
1249 for (;;) {
1250 /* check whether the controller is done */
1251 stat = hc_interrupt();
1252 if (stat < 0) {
1253 stat = USB_ST_CRC_ERR;
1254 break;
1255 }
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001256
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001257 /* NOTE: since we are not interrupt driven in U-Boot and always
1258 * handle only one URB at a time, we cannot assume the
1259 * transaction finished on the first successful return from
1260 * hc_interrupt().. unless the flag for current URB is set,
1261 * meaning that all TD's to/from device got actually
1262 * transferred and processed. If the current URB is not
1263 * finished we need to re-iterate this loop so as
1264 * hc_interrupt() gets called again as there needs to be some
1265 * more TD's to process still */
1266 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
wdenk80885a92004-02-26 23:46:20 +00001267 /* 0xff is returned for an SF-interrupt */
1268 break;
1269 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001270
wdenk80885a92004-02-26 23:46:20 +00001271 if (--timeout) {
Mike Frysinger5b84dd62012-03-05 13:47:00 +00001272 mdelay(1);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001273 if (!urb_finished)
1274 dbg("\%");
1275
wdenk80885a92004-02-26 23:46:20 +00001276 } else {
1277 err("CTL:TIMEOUT ");
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001278 dbg("submit_common_msg: TO status %x\n", stat);
wdenk80885a92004-02-26 23:46:20 +00001279 stat = USB_ST_CRC_ERR;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001280 urb_finished = 1;
wdenk80885a92004-02-26 23:46:20 +00001281 break;
1282 }
1283 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001284#if 0
wdenk80885a92004-02-26 23:46:20 +00001285 /* we got an Root Hub Status Change interrupt */
1286 if (got_rhsc) {
1287#ifdef DEBUG
1288 ohci_dump_roothub (&gohci, 1);
1289#endif
1290 got_rhsc = 0;
1291 /* abuse timeout */
1292 timeout = rh_check_port_status(&gohci);
1293 if (timeout >= 0) {
1294#if 0 /* this does nothing useful, but leave it here in case that changes */
1295 /* the called routine adds 1 to the passed value */
1296 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1297#endif
1298 /*
1299 * XXX
1300 * This is potentially dangerous because it assumes
1301 * that only one device is ever plugged in!
1302 */
1303 devgone = dev;
1304 }
1305 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001306#endif
wdenk80885a92004-02-26 23:46:20 +00001307
1308 dev->status = stat;
1309 dev->act_len = transfer_len;
1310
1311#ifdef DEBUG
1312 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1313#endif
1314
1315 /* free TDs in urb_priv */
1316 urb_free_priv (&urb_priv);
1317 return 0;
1318}
1319
1320/* submit routines called from usb.c */
1321int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1322 int transfer_len)
1323{
1324 info("submit_bulk_msg");
1325 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1326}
1327
1328int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1329 int transfer_len, struct devrequest *setup)
1330{
1331 int maxsize = usb_maxpacket(dev, pipe);
1332
1333 info("submit_control_msg");
1334#ifdef DEBUG
1335 urb_priv.actual_length = 0;
1336 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1337#endif
1338 if (!maxsize) {
1339 err("submit_control_message: pipesize for pipe %lx is zero",
1340 pipe);
1341 return -1;
1342 }
1343 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1344 gohci.rh.dev = dev;
1345 /* root hub - redirect */
1346 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1347 setup);
1348 }
1349
1350 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1351}
1352
1353int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1354 int transfer_len, int interval)
1355{
1356 info("submit_int_msg");
1357 return -1;
1358}
1359
1360/*-------------------------------------------------------------------------*
1361 * HC functions
1362 *-------------------------------------------------------------------------*/
1363
1364/* reset the HC and BUS */
1365
1366static int hc_reset (ohci_t *ohci)
1367{
1368 int timeout = 30;
1369 int smm_timeout = 50; /* 0,5 sec */
1370
1371 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1372 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1373 info("USB HC TakeOver from SMM");
1374 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
Mike Frysinger5b84dd62012-03-05 13:47:00 +00001375 mdelay (10);
wdenk80885a92004-02-26 23:46:20 +00001376 if (--smm_timeout == 0) {
1377 err("USB HC TakeOver failed!");
1378 return -1;
1379 }
1380 }
1381 }
1382
1383 /* Disable HC interrupts */
1384 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1385
1386 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1387 ohci->slot_name,
1388 readl (&ohci->regs->control));
1389
1390 /* Reset USB (needed by some controllers) */
1391 ohci->hc_control = 0;
1392 writel (ohci->hc_control, &ohci->regs->control);
1393
1394 /* HC Reset requires max 10 us delay */
1395 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1396 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1397 if (--timeout == 0) {
1398 err("USB HC reset timed out!");
1399 return -1;
1400 }
1401 udelay (1);
1402 }
1403 return 0;
1404}
1405
1406/*-------------------------------------------------------------------------*/
1407
1408/* Start an OHCI controller, set the BUS operational
1409 * enable interrupts
1410 * connect the virtual root hub */
1411
1412static int hc_start (ohci_t * ohci)
1413{
1414 __u32 mask;
1415 unsigned int fminterval;
1416
1417 ohci->disabled = 1;
1418
1419 /* Tell the controller where the control and bulk lists are
1420 * The lists are empty now. */
1421
1422 writel (0, &ohci->regs->ed_controlhead);
1423 writel (0, &ohci->regs->ed_bulkhead);
1424
1425 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1426
1427 fminterval = 0x2edf;
1428 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1429 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1430 writel (fminterval, &ohci->regs->fminterval);
1431 writel (0x628, &ohci->regs->lsthresh);
1432
1433 /* start controller operations */
1434 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1435 ohci->disabled = 0;
1436 writel (ohci->hc_control, &ohci->regs->control);
1437
1438 /* disable all interrupts */
1439 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1440 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1441 OHCI_INTR_OC | OHCI_INTR_MIE);
1442 writel (mask, &ohci->regs->intrdisable);
1443 /* clear all interrupts */
1444 mask &= ~OHCI_INTR_MIE;
1445 writel (mask, &ohci->regs->intrstatus);
1446 /* Choose the interrupts we care about now - but w/o MIE */
1447 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1448 writel (mask, &ohci->regs->intrenable);
1449
1450#ifdef OHCI_USE_NPS
1451 /* required for AMD-756 and some Mac platforms */
1452 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1453 &ohci->regs->roothub.a);
1454 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1455#endif /* OHCI_USE_NPS */
1456
wdenk80885a92004-02-26 23:46:20 +00001457 /* POTPGT delay is bits 24-31, in 2 ms units. */
1458 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1459
1460 /* connect the virtual root hub */
1461 ohci->rh.devnum = 0;
1462
1463 return 0;
1464}
1465
1466/*-------------------------------------------------------------------------*/
1467
1468/* an interrupt happens */
1469
1470static int
1471hc_interrupt (void)
1472{
1473 ohci_t *ohci = &gohci;
1474 struct ohci_regs *regs = ohci->regs;
1475 int ints;
1476 int stat = -1;
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001477
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001478 if ((ohci->hcca->done_head != 0) &&
1479 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
wdenk80885a92004-02-26 23:46:20 +00001480
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001481 ints = OHCI_INTR_WDH;
1482
1483 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1484 ohci->disabled++;
1485 err ("%s device removed!", ohci->slot_name);
1486 return -1;
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001487
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001488 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1489 dbg("hc_interrupt: returning..\n");
1490 return 0xff;
wdenk80885a92004-02-26 23:46:20 +00001491 }
1492
1493 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1494
1495 if (ints & OHCI_INTR_RHSC) {
1496 got_rhsc = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001497 stat = 0xff;
wdenk80885a92004-02-26 23:46:20 +00001498 }
1499
1500 if (ints & OHCI_INTR_UE) {
1501 ohci->disabled++;
1502 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1503 ohci->slot_name);
1504 /* e.g. due to PCI Master/Target Abort */
1505
1506#ifdef DEBUG
1507 ohci_dump (ohci, 1);
1508#endif
1509 /* FIXME: be optimistic, hope that bug won't repeat often. */
1510 /* Make some non-interrupt context restart the controller. */
1511 /* Count and limit the retries though; either hardware or */
1512 /* software errors can go forever... */
1513 hc_reset (ohci);
1514 return -1;
1515 }
1516
1517 if (ints & OHCI_INTR_WDH) {
1518 writel (OHCI_INTR_WDH, &regs->intrdisable);
1519 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1520 writel (OHCI_INTR_WDH, &regs->intrenable);
1521 }
1522
1523 if (ints & OHCI_INTR_SO) {
1524 dbg("USB Schedule overrun\n");
1525 writel (OHCI_INTR_SO, &regs->intrenable);
1526 stat = -1;
1527 }
1528
1529 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1530 if (ints & OHCI_INTR_SF) {
1531 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
Mike Frysinger5b84dd62012-03-05 13:47:00 +00001532 mdelay(1);
wdenk80885a92004-02-26 23:46:20 +00001533 writel (OHCI_INTR_SF, &regs->intrdisable);
1534 if (ohci->ed_rm_list[frame] != NULL)
1535 writel (OHCI_INTR_SF, &regs->intrenable);
1536 stat = 0xff;
1537 }
1538
1539 writel (ints, &regs->intrstatus);
1540 return stat;
1541}
1542
1543/*-------------------------------------------------------------------------*/
1544
1545/*-------------------------------------------------------------------------*/
1546
1547/* De-allocate all resources.. */
1548
1549static void hc_release_ohci (ohci_t *ohci)
1550{
1551 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1552
1553 if (!ohci->disabled)
1554 hc_reset (ohci);
1555}
1556
1557/*-------------------------------------------------------------------------*/
1558
1559/*
1560 * low level initalisation routine, called from usb.c
1561 */
1562static char ohci_inited = 0;
1563
Lucas Stachc7e3b2b2012-09-26 00:14:34 +02001564int usb_lowlevel_init(int index, void **controller)
wdenk80885a92004-02-26 23:46:20 +00001565{
1566
1567 /* Set the USB Clock */
wdenk4d13cba2004-03-14 14:09:05 +00001568 *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
wdenkc3f9d492004-03-14 00:59:59 +00001569
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001570#ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
1571 /* remove all PSC3 USB bits first before ORing in ours */
1572 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00804f00;
1573#else
wdenkc3f9d492004-03-14 00:59:59 +00001574 /* remove all USB bits first before ORing in ours */
1575 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001576#endif
wdenk80885a92004-02-26 23:46:20 +00001577 /* Activate USB port */
wdenk4d13cba2004-03-14 14:09:05 +00001578 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
wdenk80885a92004-02-26 23:46:20 +00001579
1580 memset (&gohci, 0, sizeof (ohci_t));
1581 memset (&urb_priv, 0, sizeof (urb_priv_t));
1582
1583 /* align the storage */
1584 if ((__u32)&ghcca[0] & 0xff) {
1585 err("HCCA not aligned!!");
1586 return -1;
1587 }
1588 phcca = &ghcca[0];
1589 info("aligned ghcca %p", phcca);
1590 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1591 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1592 err("EDs not aligned!!");
1593 return -1;
1594 }
1595 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1596 if ((__u32)gtd & 0x7) {
1597 err("TDs not aligned!!");
1598 return -1;
1599 }
1600 ptd = gtd;
1601 gohci.hcca = phcca;
1602 memset (phcca, 0, sizeof (struct ohci_hcca));
1603
1604 gohci.disabled = 1;
1605 gohci.sleeping = 0;
1606 gohci.irq = -1;
1607 gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
1608
1609 gohci.flags = 0;
1610 gohci.slot_name = "mpc5200";
1611
1612 if (hc_reset (&gohci) < 0) {
1613 hc_release_ohci (&gohci);
1614 return -1;
1615 }
1616
1617 if (hc_start (&gohci) < 0) {
1618 err ("can't start usb-%s", gohci.slot_name);
1619 hc_release_ohci (&gohci);
1620 return -1;
1621 }
1622
1623#ifdef DEBUG
1624 ohci_dump (&gohci, 1);
1625#endif
1626 ohci_inited = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001627 urb_finished = 1;
1628
wdenk80885a92004-02-26 23:46:20 +00001629 return 0;
1630}
1631
Lucas Stachc7e3b2b2012-09-26 00:14:34 +02001632int usb_lowlevel_stop(int index)
wdenk80885a92004-02-26 23:46:20 +00001633{
1634 /* this gets called really early - before the controller has */
1635 /* even been initialized! */
1636 if (!ohci_inited)
1637 return 0;
1638 /* TODO release any interrupts, etc. */
1639 /* call hc_release_ohci() here ? */
1640 hc_reset (&gohci);
1641 return 0;
1642}
1643
1644#endif /* CONFIG_USB_OHCI */