wdenk | dd7d41f | 2002-09-18 20:04:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * MII Utilities |
| 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | #include <command.h> |
wdenk | e35745b | 2004-04-18 23:32:11 +0000 | [diff] [blame] | 30 | #include <miiphy.h> |
| 31 | |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 32 | typedef struct _MII_reg_desc_t { |
| 33 | ushort regno; |
| 34 | char * name; |
| 35 | } MII_reg_desc_t; |
| 36 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 37 | static const MII_reg_desc_t reg_0_5_desc_tbl[] = { |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 38 | { MII_BMCR, "PHY control register" }, |
| 39 | { MII_BMSR, "PHY status register" }, |
| 40 | { MII_PHYSID1, "PHY ID 1 register" }, |
| 41 | { MII_PHYSID2, "PHY ID 2 register" }, |
| 42 | { MII_ADVERTISE, "Autonegotiation advertisement register" }, |
| 43 | { MII_LPA, "Autonegotiation partner abilities register" }, |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 44 | }; |
| 45 | |
| 46 | typedef struct _MII_field_desc_t { |
| 47 | ushort hi; |
| 48 | ushort lo; |
| 49 | ushort mask; |
| 50 | char * name; |
| 51 | } MII_field_desc_t; |
| 52 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 53 | static const MII_field_desc_t reg_0_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 54 | { 15, 15, 0x01, "reset" }, |
| 55 | { 14, 14, 0x01, "loopback" }, |
| 56 | { 13, 6, 0x81, "speed selection" }, /* special */ |
| 57 | { 12, 12, 0x01, "A/N enable" }, |
| 58 | { 11, 11, 0x01, "power-down" }, |
| 59 | { 10, 10, 0x01, "isolate" }, |
| 60 | { 9, 9, 0x01, "restart A/N" }, |
| 61 | { 8, 8, 0x01, "duplex" }, /* special */ |
| 62 | { 7, 7, 0x01, "collision test enable" }, |
| 63 | { 5, 0, 0x3f, "(reserved)" } |
| 64 | }; |
| 65 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 66 | static const MII_field_desc_t reg_1_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 67 | { 15, 15, 0x01, "100BASE-T4 able" }, |
| 68 | { 14, 14, 0x01, "100BASE-X full duplex able" }, |
| 69 | { 13, 13, 0x01, "100BASE-X half duplex able" }, |
| 70 | { 12, 12, 0x01, "10 Mbps full duplex able" }, |
| 71 | { 11, 11, 0x01, "10 Mbps half duplex able" }, |
| 72 | { 10, 10, 0x01, "100BASE-T2 full duplex able" }, |
| 73 | { 9, 9, 0x01, "100BASE-T2 half duplex able" }, |
| 74 | { 8, 8, 0x01, "extended status" }, |
| 75 | { 7, 7, 0x01, "(reserved)" }, |
| 76 | { 6, 6, 0x01, "MF preamble suppression" }, |
| 77 | { 5, 5, 0x01, "A/N complete" }, |
| 78 | { 4, 4, 0x01, "remote fault" }, |
| 79 | { 3, 3, 0x01, "A/N able" }, |
| 80 | { 2, 2, 0x01, "link status" }, |
| 81 | { 1, 1, 0x01, "jabber detect" }, |
| 82 | { 0, 0, 0x01, "extended capabilities" }, |
| 83 | }; |
| 84 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 85 | static const MII_field_desc_t reg_2_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 86 | { 15, 0, 0xffff, "OUI portion" }, |
| 87 | }; |
| 88 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 89 | static const MII_field_desc_t reg_3_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 90 | { 15, 10, 0x3f, "OUI portion" }, |
| 91 | { 9, 4, 0x3f, "manufacturer part number" }, |
| 92 | { 3, 0, 0x0f, "manufacturer rev. number" }, |
| 93 | }; |
| 94 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 95 | static const MII_field_desc_t reg_4_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 96 | { 15, 15, 0x01, "next page able" }, |
| 97 | { 14, 14, 0x01, "reserved" }, |
| 98 | { 13, 13, 0x01, "remote fault" }, |
| 99 | { 12, 12, 0x01, "reserved" }, |
| 100 | { 11, 11, 0x01, "asymmetric pause" }, |
| 101 | { 10, 10, 0x01, "pause enable" }, |
| 102 | { 9, 9, 0x01, "100BASE-T4 able" }, |
| 103 | { 8, 8, 0x01, "100BASE-TX full duplex able" }, |
| 104 | { 7, 7, 0x01, "100BASE-TX able" }, |
| 105 | { 6, 6, 0x01, "10BASE-T full duplex able" }, |
| 106 | { 5, 5, 0x01, "10BASE-T able" }, |
| 107 | { 4, 0, 0x1f, "xxx to do" }, |
| 108 | }; |
| 109 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 110 | static const MII_field_desc_t reg_5_desc_tbl[] = { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 111 | { 15, 15, 0x01, "next page able" }, |
| 112 | { 14, 14, 0x01, "acknowledge" }, |
| 113 | { 13, 13, 0x01, "remote fault" }, |
| 114 | { 12, 12, 0x01, "(reserved)" }, |
| 115 | { 11, 11, 0x01, "asymmetric pause able" }, |
| 116 | { 10, 10, 0x01, "pause able" }, |
| 117 | { 9, 9, 0x01, "100BASE-T4 able" }, |
| 118 | { 8, 8, 0x01, "100BASE-X full duplex able" }, |
| 119 | { 7, 7, 0x01, "100BASE-TX able" }, |
| 120 | { 6, 6, 0x01, "10BASE-T full duplex able" }, |
| 121 | { 5, 5, 0x01, "10BASE-T able" }, |
| 122 | { 4, 0, 0x1f, "xxx to do" }, |
| 123 | }; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 124 | typedef struct _MII_field_desc_and_len_t { |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 125 | const MII_field_desc_t *pdesc; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 126 | ushort len; |
| 127 | } MII_field_desc_and_len_t; |
| 128 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 129 | static const MII_field_desc_and_len_t desc_and_len_tbl[] = { |
| 130 | { reg_0_desc_tbl, ARRAY_SIZE(reg_0_desc_tbl) }, |
| 131 | { reg_1_desc_tbl, ARRAY_SIZE(reg_1_desc_tbl) }, |
| 132 | { reg_2_desc_tbl, ARRAY_SIZE(reg_2_desc_tbl) }, |
| 133 | { reg_3_desc_tbl, ARRAY_SIZE(reg_3_desc_tbl) }, |
| 134 | { reg_4_desc_tbl, ARRAY_SIZE(reg_4_desc_tbl) }, |
| 135 | { reg_5_desc_tbl, ARRAY_SIZE(reg_5_desc_tbl) }, |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 136 | }; |
| 137 | |
| 138 | static void dump_reg( |
| 139 | ushort regval, |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 140 | const MII_reg_desc_t *prd, |
| 141 | const MII_field_desc_and_len_t *pdl); |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 142 | |
| 143 | static int special_field( |
| 144 | ushort regno, |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 145 | const MII_field_desc_t *pdesc, |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 146 | ushort regval); |
| 147 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 148 | static void MII_dump_0_to_5( |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 149 | ushort regvals[6], |
| 150 | uchar reglo, |
| 151 | uchar reghi) |
| 152 | { |
| 153 | ulong i; |
| 154 | |
| 155 | for (i = 0; i < 6; i++) { |
| 156 | if ((reglo <= i) && (i <= reghi)) |
| 157 | dump_reg(regvals[i], ®_0_5_desc_tbl[i], |
| 158 | &desc_and_len_tbl[i]); |
| 159 | } |
| 160 | } |
| 161 | |
| 162 | static void dump_reg( |
| 163 | ushort regval, |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 164 | const MII_reg_desc_t *prd, |
| 165 | const MII_field_desc_and_len_t *pdl) |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 166 | { |
| 167 | ulong i; |
| 168 | ushort mask_in_place; |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 169 | const MII_field_desc_t *pdesc; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 170 | |
| 171 | printf("%u. (%04hx) -- %s --\n", |
| 172 | prd->regno, regval, prd->name); |
| 173 | |
| 174 | for (i = 0; i < pdl->len; i++) { |
| 175 | pdesc = &pdl->pdesc[i]; |
| 176 | |
| 177 | mask_in_place = pdesc->mask << pdesc->lo; |
| 178 | |
| 179 | printf(" (%04hx:%04hx) %u.", |
| 180 | mask_in_place, |
| 181 | regval & mask_in_place, |
| 182 | prd->regno); |
| 183 | |
| 184 | if (special_field(prd->regno, pdesc, regval)) { |
| 185 | } |
| 186 | else { |
| 187 | if (pdesc->hi == pdesc->lo) |
| 188 | printf("%2u ", pdesc->lo); |
| 189 | else |
| 190 | printf("%2u-%2u", pdesc->hi, pdesc->lo); |
| 191 | printf(" = %5u %s", |
| 192 | (regval & mask_in_place) >> pdesc->lo, |
| 193 | pdesc->name); |
| 194 | } |
| 195 | printf("\n"); |
| 196 | |
| 197 | } |
| 198 | printf("\n"); |
| 199 | } |
| 200 | |
| 201 | /* Special fields: |
| 202 | ** 0.6,13 |
| 203 | ** 0.8 |
| 204 | ** 2.15-0 |
| 205 | ** 3.15-0 |
| 206 | ** 4.4-0 |
| 207 | ** 5.4-0 |
| 208 | */ |
| 209 | |
| 210 | static int special_field( |
| 211 | ushort regno, |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 212 | const MII_field_desc_t *pdesc, |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 213 | ushort regval) |
| 214 | { |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 215 | if ((regno == MII_BMCR) && (pdesc->lo == 6)) { |
| 216 | ushort speed_bits = regval & (BMCR_SPEED1000 | BMCR_SPEED100); |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 217 | printf("%2u,%2u = b%u%u speed selection = %s Mbps", |
| 218 | 6, 13, |
| 219 | (regval >> 6) & 1, |
| 220 | (regval >> 13) & 1, |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 221 | speed_bits == BMCR_SPEED1000 ? "1000" : |
| 222 | speed_bits == BMCR_SPEED100 ? "100" : |
| 223 | "10"); |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 224 | return 1; |
| 225 | } |
| 226 | |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 227 | else if ((regno == MII_BMCR) && (pdesc->lo == 8)) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 228 | printf("%2u = %5u duplex = %s", |
| 229 | pdesc->lo, |
| 230 | (regval >> pdesc->lo) & 1, |
| 231 | ((regval >> pdesc->lo) & 1) ? "full" : "half"); |
| 232 | return 1; |
| 233 | } |
| 234 | |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 235 | else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 236 | ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask; |
| 237 | printf("%2u-%2u = %5u selector = %s", |
| 238 | pdesc->hi, pdesc->lo, sel_bits, |
wdenk | b9711de | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 239 | sel_bits == PHY_ANLPAR_PSB_802_3 ? |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 240 | "IEEE 802.3" : |
wdenk | b9711de | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 241 | sel_bits == PHY_ANLPAR_PSB_802_9 ? |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 242 | "IEEE 802.9 ISLAN-16T" : |
| 243 | "???"); |
| 244 | return 1; |
| 245 | } |
| 246 | |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 247 | else if ((regno == MII_LPA) && (pdesc->lo == 0)) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 248 | ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask; |
| 249 | printf("%2u-%2u = %u selector = %s", |
| 250 | pdesc->hi, pdesc->lo, sel_bits, |
wdenk | b9711de | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 251 | sel_bits == PHY_ANLPAR_PSB_802_3 ? |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 252 | "IEEE 802.3" : |
wdenk | b9711de | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 253 | sel_bits == PHY_ANLPAR_PSB_802_9 ? |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 254 | "IEEE 802.9 ISLAN-16T" : |
| 255 | "???"); |
| 256 | return 1; |
| 257 | } |
| 258 | |
| 259 | return 0; |
| 260 | } |
| 261 | |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 262 | static char last_op[2]; |
| 263 | static uint last_data; |
| 264 | static uint last_addr_lo; |
| 265 | static uint last_addr_hi; |
| 266 | static uint last_reg_lo; |
| 267 | static uint last_reg_hi; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 268 | |
| 269 | static void extract_range( |
| 270 | char * input, |
| 271 | unsigned char * plo, |
| 272 | unsigned char * phi) |
| 273 | { |
| 274 | char * end; |
| 275 | *plo = simple_strtoul(input, &end, 16); |
| 276 | if (*end == '-') { |
| 277 | end++; |
| 278 | *phi = simple_strtoul(end, NULL, 16); |
| 279 | } |
| 280 | else { |
| 281 | *phi = *plo; |
| 282 | } |
| 283 | } |
| 284 | |
wdenk | 5cf91d6 | 2004-04-23 20:32:05 +0000 | [diff] [blame] | 285 | /* ---------------------------------------------------------------- */ |
Mike Frysinger | 3a5ee0b | 2010-10-20 01:06:48 -0400 | [diff] [blame] | 286 | static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 287 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 288 | char op[2]; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 289 | unsigned char addrlo, addrhi, reglo, reghi; |
Wolfgang Denk | 2b792af | 2005-09-24 21:54:50 +0200 | [diff] [blame] | 290 | unsigned char addr, reg; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 291 | unsigned short data; |
| 292 | int rcode = 0; |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 293 | const char *devname; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 294 | |
Wolfgang Denk | 47e26b1 | 2010-07-17 01:06:04 +0200 | [diff] [blame] | 295 | if (argc < 2) |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 296 | return CMD_RET_USAGE; |
Shinya Kuribayashi | b9173af | 2007-12-27 15:39:54 +0900 | [diff] [blame] | 297 | |
TsiChung Liew | 0f3ba7e | 2008-03-30 01:22:13 -0500 | [diff] [blame] | 298 | #if defined(CONFIG_MII_INIT) |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 299 | mii_init (); |
| 300 | #endif |
| 301 | |
| 302 | /* |
| 303 | * We use the last specified parameters, unless new ones are |
| 304 | * entered. |
| 305 | */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 306 | op[0] = last_op[0]; |
| 307 | op[1] = last_op[1]; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 308 | addrlo = last_addr_lo; |
| 309 | addrhi = last_addr_hi; |
| 310 | reglo = last_reg_lo; |
| 311 | reghi = last_reg_hi; |
| 312 | data = last_data; |
| 313 | |
| 314 | if ((flag & CMD_FLAG_REPEAT) == 0) { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 315 | op[0] = argv[1][0]; |
| 316 | if (strlen(argv[1]) > 1) |
| 317 | op[1] = argv[1][1]; |
| 318 | else |
| 319 | op[1] = '\0'; |
| 320 | |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 321 | if (argc >= 3) |
| 322 | extract_range(argv[2], &addrlo, &addrhi); |
| 323 | if (argc >= 4) |
| 324 | extract_range(argv[3], ®lo, ®hi); |
| 325 | if (argc >= 5) |
| 326 | data = simple_strtoul (argv[4], NULL, 16); |
| 327 | } |
| 328 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 329 | /* use current device */ |
| 330 | devname = miiphy_get_current_dev(); |
| 331 | |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 332 | /* |
| 333 | * check info/read/write. |
| 334 | */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 335 | if (op[0] == 'i') { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 336 | unsigned char j, start, end; |
| 337 | unsigned int oui; |
| 338 | unsigned char model; |
| 339 | unsigned char rev; |
| 340 | |
| 341 | /* |
| 342 | * Look for any and all PHYs. Valid addresses are 0..31. |
| 343 | */ |
| 344 | if (argc >= 3) { |
Wolfgang Denk | 2b792af | 2005-09-24 21:54:50 +0200 | [diff] [blame] | 345 | start = addrlo; end = addrhi; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 346 | } else { |
Wolfgang Denk | 2b792af | 2005-09-24 21:54:50 +0200 | [diff] [blame] | 347 | start = 0; end = 31; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 348 | } |
| 349 | |
Wolfgang Denk | 2b792af | 2005-09-24 21:54:50 +0200 | [diff] [blame] | 350 | for (j = start; j <= end; j++) { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 351 | if (miiphy_info (devname, j, &oui, &model, &rev) == 0) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 352 | printf("PHY 0x%02X: " |
| 353 | "OUI = 0x%04X, " |
| 354 | "Model = 0x%02X, " |
| 355 | "Rev = 0x%02X, " |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 356 | "%3dbase%s, %s\n", |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 357 | j, oui, model, rev, |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 358 | miiphy_speed (devname, j), |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 359 | miiphy_is_1000base_x (devname, j) |
| 360 | ? "X" : "T", |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 361 | (miiphy_duplex (devname, j) == FULL) |
| 362 | ? "FDX" : "HDX"); |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 363 | } |
| 364 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 365 | } else if (op[0] == 'r') { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 366 | for (addr = addrlo; addr <= addrhi; addr++) { |
| 367 | for (reg = reglo; reg <= reghi; reg++) { |
| 368 | data = 0xffff; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 369 | if (miiphy_read (devname, addr, reg, &data) != 0) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 370 | printf( |
| 371 | "Error reading from the PHY addr=%02x reg=%02x\n", |
| 372 | addr, reg); |
| 373 | rcode = 1; |
Wolfgang Denk | 2b792af | 2005-09-24 21:54:50 +0200 | [diff] [blame] | 374 | } else { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 375 | if ((addrlo != addrhi) || (reglo != reghi)) |
| 376 | printf("addr=%02x reg=%02x data=", |
| 377 | (uint)addr, (uint)reg); |
| 378 | printf("%04X\n", data & 0x0000FFFF); |
| 379 | } |
| 380 | } |
| 381 | if ((addrlo != addrhi) && (reglo != reghi)) |
| 382 | printf("\n"); |
| 383 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 384 | } else if (op[0] == 'w') { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 385 | for (addr = addrlo; addr <= addrhi; addr++) { |
| 386 | for (reg = reglo; reg <= reghi; reg++) { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 387 | if (miiphy_write (devname, addr, reg, data) != 0) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 388 | printf("Error writing to the PHY addr=%02x reg=%02x\n", |
| 389 | addr, reg); |
| 390 | rcode = 1; |
| 391 | } |
| 392 | } |
| 393 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 394 | } else if (strncmp(op, "du", 2) == 0) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 395 | ushort regs[6]; |
| 396 | int ok = 1; |
| 397 | if ((reglo > 5) || (reghi > 5)) { |
| 398 | printf( |
| 399 | "The MII dump command only formats the " |
| 400 | "standard MII registers, 0-5.\n"); |
| 401 | return 1; |
| 402 | } |
| 403 | for (addr = addrlo; addr <= addrhi; addr++) { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 404 | for (reg = reglo; reg < reghi + 1; reg++) { |
| 405 | if (miiphy_read(devname, addr, reg, ®s[reg]) != 0) { |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 406 | ok = 0; |
| 407 | printf( |
| 408 | "Error reading from the PHY addr=%02x reg=%02x\n", |
| 409 | addr, reg); |
| 410 | rcode = 1; |
| 411 | } |
| 412 | } |
| 413 | if (ok) |
| 414 | MII_dump_0_to_5(regs, reglo, reghi); |
| 415 | printf("\n"); |
| 416 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 417 | } else if (strncmp(op, "de", 2) == 0) { |
| 418 | if (argc == 2) |
| 419 | miiphy_listdev (); |
| 420 | else |
| 421 | miiphy_set_current_dev (argv[2]); |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 422 | } else { |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 423 | return CMD_RET_USAGE; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | /* |
| 427 | * Save the parameters for repeats. |
| 428 | */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 429 | last_op[0] = op[0]; |
| 430 | last_op[1] = op[1]; |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 431 | last_addr_lo = addrlo; |
| 432 | last_addr_hi = addrhi; |
| 433 | last_reg_lo = reglo; |
| 434 | last_reg_hi = reghi; |
| 435 | last_data = data; |
| 436 | |
| 437 | return rcode; |
| 438 | } |
| 439 | |
| 440 | /***************************************************/ |
| 441 | |
| 442 | U_BOOT_CMD( |
| 443 | mii, 5, 1, do_mii, |
Peter Tyser | 2fb2604 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 444 | "MII utility commands", |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 445 | "device - list available devices\n" |
| 446 | "mii device <devname> - set current device\n" |
| 447 | "mii info <addr> - display MII PHY info\n" |
| 448 | "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n" |
| 449 | "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n" |
| 450 | "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n" |
Wolfgang Denk | a89c33d | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 451 | "Addr and/or reg may be ranges, e.g. 2-7." |
wdenk | 2471111 | 2004-04-18 22:57:51 +0000 | [diff] [blame] | 452 | ); |