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Stefan Roeseae691e52009-01-21 17:24:49 +01001/*
2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Stefan Roeseae691e52009-01-21 17:24:49 +01005 */
6
7/*
8 * This file contains the configuration parameters for the VCT board
9 * family:
10 *
11 * vct_premium
12 * vct_premium_small
13 * vct_premium_onenand
14 * vct_premium_onenand_small
15 * vct_platinum
16 * vct_platinum_small
17 * vct_platinum_onenand
18 * vct_platinum_onenand_small
19 * vct_platinumavc
20 * vct_platinumavc_small
21 * vct_platinumavc_onenand
22 * vct_platinumavc_onenand_small
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
Stefan Roeseae691e52009-01-21 17:24:49 +010028#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
29#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
Stefan Roeseae691e52009-01-21 17:24:49 +010030
31#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
32
Wolfgang Denk14d0a022010-10-07 21:51:12 +020033#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Stefan Roeseae691e52009-01-21 17:24:49 +010034#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Stefan Roeseae691e52009-01-21 17:24:49 +010035#define CONFIG_SYS_MALLOC_LEN (1 << 20)
36#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
37#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
38
39#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
40#define CONFIG_VCT_NOR
Stefan Roeseae691e52009-01-21 17:24:49 +010041#endif
42
43/*
44 * UART
45 */
Detlev Zundel294f10c2009-04-23 13:14:20 +020046#ifdef CONFIG_VCT_PLATINUMAVC
47#define UART_1_BASE 0xBDC30000
48#else
49#define UART_1_BASE 0xBF89C000
50#endif
51
52#define CONFIG_SYS_NS16550_SERIAL
Detlev Zundel294f10c2009-04-23 13:14:20 +020053#define CONFIG_SYS_NS16550_REG_SIZE -4
54#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
55#define CONFIG_CONS_INDEX 1
56#define CONFIG_SYS_NS16550_CLK 921600
Stefan Roeseae691e52009-01-21 17:24:49 +010057
58/*
59 * SDRAM
60 */
61#define CONFIG_SYS_SDRAM_BASE 0x80000000
62#define CONFIG_SYS_MBYTES_SDRAM 128
63#define CONFIG_SYS_MEMTEST_START 0x80200000
64#define CONFIG_SYS_MEMTEST_END 0x80400000
65#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
66
67#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
68/*
69 * SMSC91C11x Network Card
70 */
Ben Warren736fead2009-07-20 22:01:11 -070071#define CONFIG_SMC911X
72#define CONFIG_SMC911X_BASE 0x00000000
73#define CONFIG_SMC911X_32_BIT
Stefan Roeseae691e52009-01-21 17:24:49 +010074#define CONFIG_NET_RETRY_COUNT 20
75#endif
76
77/*
78 * Commands
79 */
Stefan Roeseae691e52009-01-21 17:24:49 +010080#define CONFIG_CMD_EEPROM
Stefan Roeseae691e52009-01-21 17:24:49 +010081
82/*
83 * Only Premium/Platinum have ethernet support right now
84 */
Daniel Schwierzeck383015b2011-02-03 14:17:08 +010085#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
86 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roeseae691e52009-01-21 17:24:49 +010087#endif
88
89/*
90 * Only Premium/Platinum have USB-EHCI support right now
91 */
Daniel Schwierzeck383015b2011-02-03 14:17:08 +010092#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
93 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roeseae691e52009-01-21 17:24:49 +010094#endif
95
96#if defined(CONFIG_CMD_USB)
Stefan Roeseae691e52009-01-21 17:24:49 +010097#define CONFIG_SUPPORT_VFAT
98
99/*
100 * USB/EHCI
101 */
102#define CONFIG_USB_EHCI /* Enable EHCI USB support */
103#define CONFIG_USB_EHCI_VCT /* on VCT platform */
Stefan Roeseae691e52009-01-21 17:24:49 +0100104#define CONFIG_EHCI_MMIO_BIG_ENDIAN
105#define CONFIG_EHCI_DESC_BIG_ENDIAN
106#define CONFIG_EHCI_IS_TDI
107#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
108#endif /* CONFIG_CMD_USB */
109
Stefan Roeseae691e52009-01-21 17:24:49 +0100110#if defined(CONFIG_VCT_NAND)
111#define CONFIG_CMD_NAND
112#endif
113
114#if defined(CONFIG_VCT_ONENAND)
115#define CONFIG_CMD_ONENAND
116#endif
117
118/*
119 * BOOTP options
120 */
121#define CONFIG_BOOTP_BOOTFILESIZE
122#define CONFIG_BOOTP_BOOTPATH
123#define CONFIG_BOOTP_GATEWAY
124#define CONFIG_BOOTP_HOSTNAME
125#define CONFIG_BOOTP_SUBNETMASK
126
127/*
128 * Miscellaneous configurable options
129 */
130#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefan Roeseae691e52009-01-21 17:24:49 +0100131#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
132#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
133 sizeof(CONFIG_SYS_PROMPT) + 16)
134#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
135#define CONFIG_TIMESTAMP /* Print image info with timestamp */
136#define CONFIG_CMDLINE_EDITING /* add command line history */
Stefan Roeseae691e52009-01-21 17:24:49 +0100137
138/*
139 * FLASH and environment organization
140 */
141#if defined(CONFIG_VCT_NOR)
142#define CONFIG_ENV_IS_IN_FLASH
143#define CONFIG_FLASH_NOT_MEM_MAPPED
144
145/*
146 * We need special accessor functions for the CFI FLASH driver. This
147 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
148 */
149#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
150
151/*
152 * For the non-memory-mapped NOR FLASH, we need to define the
153 * NOR FLASH area. This can't be detected via the addr2info()
154 * function, since we check for flash access in the very early
155 * U-Boot code, before the NOR FLASH is detected.
156 */
157#define CONFIG_FLASH_BASE 0xb0000000
158#define CONFIG_FLASH_END 0xbfffffff
159
160/*
161 * CFI driver settings
162 */
163#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
164#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
165#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
166#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
167
168#define CONFIG_SYS_FLASH_BASE 0xb0000000
169#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
170#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
171#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
172
173#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
174#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
175
176#ifdef CONFIG_ENV_IS_IN_FLASH
177#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
178#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
179#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
180
181/* Address and size of Redundant Environment Sector */
182#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
183#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
184#endif /* CONFIG_ENV_IS_IN_FLASH */
185#endif /* CONFIG_VCT_NOR */
186
187#if defined(CONFIG_VCT_ONENAND)
188#define CONFIG_USE_ONENAND_BOARD_INIT
189#define CONFIG_ENV_IS_IN_ONENAND
190#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
191#define CONFIG_SYS_FLASH_BASE 0x00000000
192#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
193#define CONFIG_ENV_SIZE (128 << 10) /* erase size */
194#endif /* CONFIG_VCT_ONENAND */
195
196/*
Stefan Roeseae691e52009-01-21 17:24:49 +0100197 * I2C/EEPROM
198 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100199#define CONFIG_SYS_I2C
200#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
201#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
202#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
Stefan Roeseae691e52009-01-21 17:24:49 +0100203
204/*
205 * Software (bit-bang) I2C driver configuration
206 */
207#define CONFIG_SYS_GPIO_I2C_SCL 11
208#define CONFIG_SYS_GPIO_I2C_SDA 10
209
210#ifndef __ASSEMBLY__
211int vct_gpio_dir(int pin, int dir);
212void vct_gpio_set(int pin, int val);
213int vct_gpio_get(int pin);
214#endif
215
216#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
217#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
218#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
219#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
220#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
221#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
222#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
223
224#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
225/* CAT24WC32 */
226#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
227#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
228 /* 32 byte page write mode using*/
229 /* last 5 bits of the address */
230#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
231
232#define CONFIG_BOOTCOMMAND "run test3"
Stefan Roeseae691e52009-01-21 17:24:49 +0100233
234/*
Stefan Roeseae691e52009-01-21 17:24:49 +0100235 * UBI configuration
236 */
237#if defined(CONFIG_VCT_ONENAND)
238#define CONFIG_SYS_USE_UBI
239#define CONFIG_CMD_JFFS2
Stefan Roeseae691e52009-01-21 17:24:49 +0100240#define CONFIG_RBTREE
Stefan Roese942556a2009-05-12 14:32:58 +0200241#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Stefan Roeseae691e52009-01-21 17:24:49 +0100242#define CONFIG_MTD_PARTITIONS
Stefan Roese68d7d652009-03-19 13:30:36 +0100243#define CONFIG_CMD_MTDPARTS
Stefan Roeseae691e52009-01-21 17:24:49 +0100244
245#define MTDIDS_DEFAULT "onenand0=onenand"
246#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
247 "128k(env)," \
248 "20m(kernel)," \
249 "-(rootfs)"
250#endif
251
252/*
253 * We need a small, stripped down image to fit into the first 128k OneNAND
254 * erase block (gzipped). This image only needs basic commands for FLASH
255 * (NOR/OneNAND) usage and Linux kernel booting.
256 */
257#if defined(CONFIG_VCT_SMALL_IMAGE)
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200258#undef CONFIG_CMD_BEDBUG
Stefan Roeseae691e52009-01-21 17:24:49 +0100259#undef CONFIG_CMD_EEPROM
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200260#undef CONFIG_CMD_EEPROM
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200261#undef CONFIG_CMD_IRQ
Stefan Roeseae691e52009-01-21 17:24:49 +0100262#undef CONFIG_CMD_LOADY
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200263#undef CONFIG_CMD_REGINFO
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200264#undef CONFIG_CMD_STRINGS
265#undef CONFIG_CMD_TERMINAL
Stefan Roeseae691e52009-01-21 17:24:49 +0100266
Ben Warren736fead2009-07-20 22:01:11 -0700267#undef CONFIG_SMC911X
Heiko Schocherea818db2013-01-29 08:53:15 +0100268#undef CONFIG_SYS_I2C_SOFT
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200269#undef CONFIG_SOURCE
Stefan Roeseae691e52009-01-21 17:24:49 +0100270#undef CONFIG_SYS_LONGHELP
271#undef CONFIG_TIMESTAMP
272#endif /* CONFIG_VCT_SMALL_IMAGE */
273
274#endif /* __CONFIG_H */