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Mike Frysinger5c45f7c2008-10-12 21:25:33 -04001/*
2 * U-boot - Configuration file for BF538F EZ-Kit Lite board
3 */
4
5#ifndef __CONFIG_BF538F_EZKIT_H__
6#define __CONFIG_BF538F_EZKIT_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger5c45f7c2008-10-12 21:25:33 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysinger5c45f7c2008-10-12 21:25:33 -040014#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
15
16
17/*
18 * Clock Settings
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
21 */
22/* CONFIG_CLKIN_HZ is any value in Hz */
23#define CONFIG_CLKIN_HZ 25000000
24/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25/* 1 = CLKIN / 2 */
26#define CONFIG_CLKIN_HALF 0
27/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28/* 1 = bypass PLL */
29#define CONFIG_PLL_BYPASS 0
30/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31/* Values can range from 0-63 (where 0 means 64) */
32#define CONFIG_VCO_MULT 21
33/* CCLK_DIV controls the core clock divider */
34/* Values can be 1, 2, 4, or 8 ONLY */
35#define CONFIG_CCLK_DIV 1
36/* SCLK_DIV controls the system clock divider */
37/* Values can range from 1-15 */
38#define CONFIG_SCLK_DIV 4
39
40
41/*
42 * Memory Settings
43 */
44#define CONFIG_MEM_ADD_WDTH 10
45#define CONFIG_MEM_SIZE 64
46
47#define CONFIG_EBIU_SDRRC_VAL (0x03F6)
48#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_3 | TRP_3 | TRAS_6 | PASR_ALL | CL_3)
49
50#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | AMBEN_ALL | AMCKEN)
51#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
52#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
53
54#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
55#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
56
57
58/*
59 * Network Settings
60 */
61#define ADI_CMDS_NETWORK 1
Ben Warren7194ab82009-10-04 22:37:03 -070062#define CONFIG_NET_MULTI
63#define CONFIG_SMC91111 1
Mike Frysinger5c45f7c2008-10-12 21:25:33 -040064#define CONFIG_SMC91111_BASE 0x20310300
65#define CONFIG_HOSTNAME bf538f-ezkit
66/* Uncomment next line to use fixed MAC address */
67/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
68
69
70/*
71 * Flash Settings
72 */
73#define CONFIG_FLASH_CFI_DRIVER
74#define CONFIG_SYS_FLASH_BASE 0x20000000
75#define CONFIG_SYS_FLASH_CFI
76#define CONFIG_SYS_FLASH_PROTECTION
77#define CONFIG_SYS_MAX_FLASH_BANKS 1
78#define CONFIG_SYS_MAX_FLASH_SECT 71
79
80
81/*
82 * SPI Settings
83 */
84#define CONFIG_BFIN_SPI
85#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysingerafac8b02009-06-14 22:29:35 -040086#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger5c45f7c2008-10-12 21:25:33 -040087#define CONFIG_SPI_FLASH
Mike Frysingerf4532202010-09-19 16:26:55 -040088#define CONFIG_SPI_FLASH_ALL
Mike Frysinger5c45f7c2008-10-12 21:25:33 -040089
90
91/*
92 * Env Storage Settings
93 */
94#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
95#define CONFIG_ENV_IS_IN_SPI_FLASH
96#define CONFIG_ENV_OFFSET 0x4000
97#define CONFIG_ENV_SIZE 0x2000
98#define CONFIG_ENV_SECT_SIZE 0x2000
99#else
100#define CONFIG_ENV_IS_IN_FLASH
101#define CONFIG_ENV_OFFSET 0x4000
102#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
103#define CONFIG_ENV_SIZE 0x2000
104#define CONFIG_ENV_SECT_SIZE 0x2000
105#endif
106#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
107#define ENV_IS_EMBEDDED
108#else
Mike Frysinger76d82182009-07-21 22:17:36 -0400109#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger5c45f7c2008-10-12 21:25:33 -0400110#endif
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400111#ifdef ENV_IS_EMBEDDED
112/* WARNING - the following is hand-optimized to fit within
113 * the sector before the environment sector. If it throws
114 * an error during compilation remove an object here to get
115 * it linked after the configuration sector.
116 */
117# define LDS_BOARD_TEXT \
Peter Tyserc6fb83d2010-04-12 22:28:13 -0500118 arch/blackfin/cpu/traps.o (.text .text.*); \
119 arch/blackfin/cpu/interrupt.o (.text .text.*); \
120 arch/blackfin/cpu/serial.o (.text .text.*); \
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400121 common/dlmalloc.o (.text .text.*); \
Peter Tyser78acc472010-04-12 22:28:05 -0500122 lib/crc32.o (.text .text.*); \
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400123 . = DEFINED(env_offset) ? env_offset : .; \
124 common/env_embedded.o (.text .text.*);
125#endif
Mike Frysinger5c45f7c2008-10-12 21:25:33 -0400126
127
128/*
129 * I2C Settings
130 */
131#define CONFIG_BFIN_TWI_I2C 1
132#define CONFIG_HARD_I2C 1
Mike Frysinger5c45f7c2008-10-12 21:25:33 -0400133
134
135/*
136 * Misc Settings
137 */
138#define CONFIG_RTC_BFIN
139#define CONFIG_UART_CONSOLE 0
140
141
142/*
143 * Pull in common ADI header for remaining command/environment setup
144 */
145#include <configs/bfin_adi_common.h>
146
Mike Frysinger5c45f7c2008-10-12 21:25:33 -0400147#endif