Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 80af39842e64a44258ab5eb913659e29fc319903 / . / arch / x86 / dts / galileo.dts
blob: 2342de7c1061170fc8a27f7ad24c9b2a4dae0af7 [file] [log] [blame]
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]1/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8
Bin Meng20c34112015-02-05 23:42:28 +0800[diff] [blame]9#include <dt-bindings/mrc/quark.h>
Bin Meng05b98ec2015-05-25 22:35:06 +0800[diff] [blame]10#include <dt-bindings/interrupt-router/intel-irq.h>
Bin Meng20c34112015-02-05 23:42:28 +0800[diff] [blame]11
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]12/include/ "skeleton.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +0800[diff] [blame]13/include/ "rtc.dtsi"
Bin Meng80af3982015-11-13 00:11:22 -0800[diff] [blame^]14/include/ "tsc_timer.dtsi"
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]15
16/ {
17 model = "Intel Galileo";
18 compatible = "intel,galileo", "intel,quark";
19
Bin Meng0a9bb482015-04-15 12:00:11 +0800[diff] [blame]20 aliases {
21 spi0 = "/spi";
22 };
23
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]24 config {
25 silent_console = <0>;
26 };
27
28 chosen {
29 stdout-path = &pciuart0;
30 };
31
Bin Meng80af3982015-11-13 00:11:22 -0800[diff] [blame^]32 tsc-timer {
33 clock-frequency = <400000000>;
34 };
35
Bin Meng20c34112015-02-05 23:42:28 +0800[diff] [blame]36 mrc {
37 compatible = "intel,quark-mrc";
38 flags = <MRC_FLAG_SCRAMBLE_EN>;
39 dram-width = <DRAM_WIDTH_X8>;
40 dram-speed = <DRAM_FREQ_800>;
41 dram-type = <DRAM_TYPE_DDR3>;
42 rank-mask = <DRAM_RANK(0)>;
43 chan-mask = <DRAM_CHANNEL(0)>;
44 chan-width = <DRAM_CHANNEL_WIDTH_X16>;
45 addr-mode = <DRAM_ADDR_MODE0>;
46 refresh-rate = <DRAM_REFRESH_RATE_785US>;
47 sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
48 ron-value = <DRAM_RON_34OHM>;
49 rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
50 rd-odt-value = <DRAM_RD_ODT_OFF>;
51 dram-density = <DRAM_DENSITY_1G>;
52 dram-cl = <6>;
53 dram-ras = <0x0000927c>;
54 dram-wtr = <0x00002710>;
55 dram-rrd = <0x00002710>;
56 dram-faw = <0x00009c40>;
57 };
58
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]59 pci {
60 #address-cells = <3>;
61 #size-cells = <2>;
Bin Meng31b5aeb2015-09-03 05:37:26 -0700[diff] [blame]62 compatible = "pci-x86";
63 u-boot,dm-pre-reloc;
64 ranges = <0x02000000 0x0 0x90000000 0x90000000 0 0x20000000
65 0x42000000 0x0 0xb0000000 0xb0000000 0 0x20000000
66 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]67
68 pciuart0: uart@14,5 {
69 compatible = "pci8086,0936.00",
70 "pci8086,0936",
71 "pciclass,070002",
72 "pciclass,0700",
73 "x86-uart";
Bin Meng31b5aeb2015-09-03 05:37:26 -0700[diff] [blame]74 u-boot,dm-pre-reloc;
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]75 reg = <0x0000a500 0x0 0x0 0x0 0x0
76 0x0200a510 0x0 0x0 0x0 0x0>;
77 reg-shift = <2>;
78 clock-frequency = <44236800>;
79 current-speed = <115200>;
80 };
Bin Meng05b98ec2015-05-25 22:35:06 +0800[diff] [blame]81
82 irq-router@1f,0 {
83 reg = <0x0000f800 0 0 0 0>;
84 compatible = "intel,irq-router";
85 intel,pirq-config = "pci";
86 intel,pirq-link = <0x60 8>;
87 intel,pirq-mask = <0xdef8>;
88 intel,pirq-routing = <
89 PCI_BDF(0, 20, 0) INTA PIRQE
90 PCI_BDF(0, 20, 1) INTB PIRQF
91 PCI_BDF(0, 20, 2) INTC PIRQG
92 PCI_BDF(0, 20, 3) INTD PIRQH
93 PCI_BDF(0, 20, 4) INTA PIRQE
94 PCI_BDF(0, 20, 5) INTB PIRQF
95 PCI_BDF(0, 20, 6) INTC PIRQG
96 PCI_BDF(0, 20, 7) INTD PIRQH
97 PCI_BDF(0, 21, 0) INTA PIRQE
98 PCI_BDF(0, 21, 1) INTB PIRQF
99 PCI_BDF(0, 21, 2) INTC PIRQG
Bin Meng5bf0f7f2015-09-09 23:20:28 -0700[diff] [blame]100 PCI_BDF(0, 23, 0) INTA PIRQA
101 PCI_BDF(0, 23, 1) INTB PIRQB
102
103 /* PCIe root ports downstream interrupts */
104 PCI_BDF(1, 0, 0) INTA PIRQA
105 PCI_BDF(1, 0, 0) INTB PIRQB
106 PCI_BDF(1, 0, 0) INTC PIRQC
107 PCI_BDF(1, 0, 0) INTD PIRQD
108 PCI_BDF(2, 0, 0) INTA PIRQB
109 PCI_BDF(2, 0, 0) INTB PIRQC
110 PCI_BDF(2, 0, 0) INTC PIRQD
111 PCI_BDF(2, 0, 0) INTD PIRQA
Bin Meng05b98ec2015-05-25 22:35:06 +0800[diff] [blame]112 >;
113 };
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]114 };
115
Bin Mengd8b1d222015-02-04 16:26:10 +0800[diff] [blame]116 gpioa {
117 compatible = "intel,ich6-gpio";
118 u-boot,dm-pre-reloc;
119 reg = <0 0x20>;
120 bank-name = "A";
121 };
122
123 gpiob {
124 compatible = "intel,ich6-gpio";
125 u-boot,dm-pre-reloc;
126 reg = <0x20 0x20>;
127 bank-name = "B";
128 };
129
Bin Meng728b3932015-02-04 16:26:12 +0800[diff] [blame]130 spi {
131 #address-cells = <1>;
132 #size-cells = <0>;
133 compatible = "intel,ich-spi";
134 spi-flash@0 {
135 #size-cells = <1>;
136 #address-cells = <1>;
137 reg = <0>;
138 compatible = "winbond,w25q64", "spi-flash";
139 memory-map = <0xff800000 0x00800000>;
Bin Meng06f16c42015-10-12 01:30:43 -0700[diff] [blame]140 rw-mrc-cache {
141 label = "rw-mrc-cache";
142 reg = <0x00010000 0x00010000>;
143 };
Bin Meng728b3932015-02-04 16:26:12 +0800[diff] [blame]144 };
145 };
146
Bin Mengafee3fb2015-02-02 22:35:28 +0800[diff] [blame]147};