blob: 93671793a9f61d416824115d844ef3d939da17db [file] [log] [blame]
Tom Warrendc89ad12012-12-11 13:34:12 +00001/*
2 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _TEGRA30_H_
18#define _TEGRA30_H_
19
Marcel Ziswiler8c33ba72014-10-10 23:32:32 +020020#define NV_PA_MC_BASE 0x7000F000
Tom Warrendc89ad12012-12-11 13:34:12 +000021#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
22
23#include <asm/arch-tegra/tegra.h>
24
Lucas Stach7ae18f32013-02-07 07:16:29 +000025#define TEGRA_USB1_BASE 0x7D000000
26
Tom Warrendc89ad12012-12-11 13:34:12 +000027#define BCT_ODMDATA_OFFSET 6116 /* 12 bytes from end of BCT */
28
Tom Warrenf29f0862013-01-23 14:01:01 -070029#define MAX_NUM_CPU 4
30
Tom Warrendc89ad12012-12-11 13:34:12 +000031#endif /* TEGRA30_H */