wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 1 | /* |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 2 | * (C) Copyright 2001 |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 4 | * |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 5 | * (C) Copyright 2001 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <common.h> |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 28 | #include <linux/byteorder/swab.h> |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 29 | |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 30 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 31 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 32 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 33 | /* Board support for 1 or 2 flash devices */ |
| 34 | #define FLASH_PORT_WIDTH32 |
| 35 | #undef FLASH_PORT_WIDTH16 |
| 36 | |
| 37 | #ifdef FLASH_PORT_WIDTH16 |
| 38 | #define FLASH_PORT_WIDTH ushort |
| 39 | #define FLASH_PORT_WIDTHV vu_short |
| 40 | #define SWAP(x) __swab16(x) |
| 41 | #else |
| 42 | #define FLASH_PORT_WIDTH ulong |
| 43 | #define FLASH_PORT_WIDTHV vu_long |
| 44 | #define SWAP(x) __swab32(x) |
| 45 | #endif |
| 46 | |
| 47 | #define FPW FLASH_PORT_WIDTH |
| 48 | #define FPWV FLASH_PORT_WIDTHV |
| 49 | |
| 50 | #define mb() __asm__ __volatile__ ("" : : : "memory") |
| 51 | |
| 52 | /*----------------------------------------------------------------------- |
| 53 | * Functions |
| 54 | */ |
| 55 | static ulong flash_get_size (FPW *addr, flash_info_t *info); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 56 | static int write_data (flash_info_t *info, ulong dest, FPW data); |
| 57 | static void flash_get_offsets (ulong base, flash_info_t *info); |
| 58 | void inline spin_wheel (void); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 59 | |
| 60 | /*----------------------------------------------------------------------- |
| 61 | */ |
| 62 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 63 | unsigned long flash_init (void) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 64 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 65 | int i; |
| 66 | ulong size = 0; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 67 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 69 | switch (i) { |
| 70 | case 0: |
| 71 | flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); |
| 72 | flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); |
| 73 | break; |
| 74 | case 1: |
| 75 | flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]); |
| 76 | flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); |
| 77 | break; |
| 78 | default: |
wdenk | 5f535fe | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 79 | panic ("configured too many flash banks!\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 80 | break; |
| 81 | } |
| 82 | size += flash_info[i].size; |
| 83 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 84 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 85 | /* Protect monitor and environment sectors |
| 86 | */ |
| 87 | flash_protect ( FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 88 | CONFIG_SYS_FLASH_BASE, |
| 89 | CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 90 | &flash_info[0] ); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 91 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 92 | flash_protect ( FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 93 | CONFIG_ENV_ADDR, |
| 94 | CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] ); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 95 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 96 | return size; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | /*----------------------------------------------------------------------- |
| 100 | */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 101 | static void flash_get_offsets (ulong base, flash_info_t *info) |
| 102 | { |
| 103 | int i; |
| 104 | |
| 105 | if (info->flash_id == FLASH_UNKNOWN) { |
| 106 | return; |
| 107 | } |
| 108 | |
| 109 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { |
| 110 | for (i = 0; i < info->sector_count; i++) { |
| 111 | info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); |
| 112 | info->protect[i] = 0; |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | /*----------------------------------------------------------------------- |
| 118 | */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 119 | void flash_print_info (flash_info_t *info) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 120 | { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 121 | int i; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 122 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 123 | if (info->flash_id == FLASH_UNKNOWN) { |
| 124 | printf ("missing or unknown FLASH type\n"); |
| 125 | return; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 126 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 127 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 128 | switch (info->flash_id & FLASH_VENDMASK) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 129 | case FLASH_MAN_INTEL: |
| 130 | printf ("INTEL "); |
| 131 | break; |
| 132 | default: |
| 133 | printf ("Unknown Vendor "); |
| 134 | break; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | switch (info->flash_id & FLASH_TYPEMASK) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 138 | case FLASH_28F128J3A: |
| 139 | printf ("28F128J3A\n"); |
| 140 | break; |
| 141 | default: |
| 142 | printf ("Unknown Chip Type\n"); |
| 143 | break; |
| 144 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 145 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 146 | printf (" Size: %ld MB in %d Sectors\n", |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 147 | info->size >> 20, info->sector_count); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 148 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 149 | printf (" Sector Start Addresses:"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 150 | for (i = 0; i < info->sector_count; ++i) { |
| 151 | if ((i % 5) == 0) |
| 152 | printf ("\n "); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 153 | printf (" %08lX%s", |
| 154 | info->start[i], |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 155 | info->protect[i] ? " (RO)" : " "); |
| 156 | } |
| 157 | printf ("\n"); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 158 | return; |
| 159 | } |
| 160 | |
| 161 | /* |
| 162 | * The following code cannot be run from FLASH! |
| 163 | */ |
| 164 | static ulong flash_get_size (FPW *addr, flash_info_t *info) |
| 165 | { |
| 166 | volatile FPW value; |
| 167 | |
| 168 | /* Write auto select command: read Manufacturer ID */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 169 | addr[0x5555] = (FPW) 0x00AA00AA; |
| 170 | addr[0x2AAA] = (FPW) 0x00550055; |
| 171 | addr[0x5555] = (FPW) 0x00900090; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 172 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 173 | mb (); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 174 | value = addr[0]; |
| 175 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 176 | switch (value) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 177 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 178 | case (FPW) INTEL_MANUFACT: |
| 179 | info->flash_id = FLASH_MAN_INTEL; |
| 180 | break; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 181 | |
| 182 | default: |
| 183 | info->flash_id = FLASH_UNKNOWN; |
| 184 | info->sector_count = 0; |
| 185 | info->size = 0; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 186 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 187 | return (0); /* no or unknown flash */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 188 | } |
| 189 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 190 | mb (); |
| 191 | value = addr[1]; /* device ID */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 192 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 193 | switch (value) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 194 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 195 | case (FPW) INTEL_ID_28F128J3A: |
| 196 | info->flash_id += FLASH_28F128J3A; |
| 197 | info->sector_count = 128; |
| 198 | info->size = 0x02000000; |
| 199 | break; /* => 16 MB */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 200 | |
| 201 | default: |
| 202 | info->flash_id = FLASH_UNKNOWN; |
| 203 | break; |
| 204 | } |
| 205 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 206 | if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 207 | printf ("** ERROR: sector count %d > max (%d) **\n", |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 208 | info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); |
| 209 | info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 210 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 211 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 212 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 213 | |
| 214 | return (info->size); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 215 | } |
| 216 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 217 | |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 218 | /*----------------------------------------------------------------------- |
| 219 | */ |
| 220 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 221 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 222 | { |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 223 | int prot, sect; |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 224 | ulong type, start; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 225 | int rcode = 0; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 226 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 227 | if ((s_first < 0) || (s_first > s_last)) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 228 | if (info->flash_id == FLASH_UNKNOWN) { |
| 229 | printf ("- missing\n"); |
| 230 | } else { |
| 231 | printf ("- no sectors to erase\n"); |
| 232 | } |
| 233 | return 1; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 234 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 235 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 236 | type = (info->flash_id & FLASH_VENDMASK); |
| 237 | if ((type != FLASH_MAN_INTEL)) { |
| 238 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 239 | info->flash_id); |
| 240 | return 1; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 241 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 242 | |
| 243 | prot = 0; |
| 244 | for (sect = s_first; sect <= s_last; ++sect) { |
| 245 | if (info->protect[sect]) { |
| 246 | prot++; |
| 247 | } |
| 248 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 249 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 250 | if (prot) { |
| 251 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 252 | prot); |
| 253 | } else { |
| 254 | printf ("\n"); |
| 255 | } |
| 256 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 257 | /* Disable interrupts which might cause a timeout here */ |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 258 | disable_interrupts(); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 259 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 260 | /* Start erase on unprotected sectors */ |
| 261 | for (sect = s_first; sect <= s_last; sect++) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 262 | if (info->protect[sect] == 0) { /* not protected */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 263 | FPWV *addr = (FPWV *) (info->start[sect]); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 264 | FPW status; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 265 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 266 | printf ("Erasing sector %2d ... ", sect); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 267 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 268 | /* arm simple, non interrupt dependent timer */ |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 269 | start = get_timer(0); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 270 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 271 | *addr = (FPW) 0x00500050; /* clear status register */ |
| 272 | *addr = (FPW) 0x00200020; /* erase setup */ |
| 273 | *addr = (FPW) 0x00D000D0; /* erase confirm */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 274 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 275 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 276 | if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 277 | printf ("Timeout\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 278 | *addr = (FPW) 0x00B000B0; /* suspend erase */ |
| 279 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 280 | rcode = 1; |
| 281 | break; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 282 | } |
| 283 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 284 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 285 | *addr = 0x00500050; /* clear status register cmd. */ |
| 286 | *addr = 0x00FF00FF; /* resest to read mode */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 287 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 288 | printf (" done\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 289 | } |
| 290 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 291 | return rcode; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | /*----------------------------------------------------------------------- |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 295 | * Copy memory to flash, returns: |
| 296 | * 0 - OK |
| 297 | * 1 - write timeout |
| 298 | * 2 - Flash not erased |
| 299 | * 4 - Flash not identified |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 300 | */ |
| 301 | |
| 302 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 303 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 304 | ulong cp, wp; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 305 | FPW data; |
| 306 | int count, i, l, rc, port_width; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 307 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 308 | if (info->flash_id == FLASH_UNKNOWN) { |
| 309 | return 4; |
| 310 | } |
| 311 | /* get lower word aligned address */ |
| 312 | #ifdef FLASH_PORT_WIDTH16 |
| 313 | wp = (addr & ~1); |
| 314 | port_width = 2; |
| 315 | #else |
| 316 | wp = (addr & ~3); |
| 317 | port_width = 4; |
| 318 | #endif |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 319 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 320 | /* |
| 321 | * handle unaligned start bytes |
| 322 | */ |
| 323 | if ((l = addr - wp) != 0) { |
| 324 | data = 0; |
| 325 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 326 | data = (data << 8) | (*(uchar *) cp); |
| 327 | } |
| 328 | for (; i < port_width && cnt > 0; ++i) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 329 | data = (data << 8) | *src++; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 330 | --cnt; |
| 331 | ++cp; |
| 332 | } |
| 333 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
| 334 | data = (data << 8) | (*(uchar *) cp); |
| 335 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 336 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 337 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 338 | return (rc); |
| 339 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 340 | wp += port_width; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 341 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 342 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 343 | /* |
| 344 | * handle word aligned part |
| 345 | */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 346 | count = 0; |
| 347 | while (cnt >= port_width) { |
| 348 | data = 0; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 349 | for (i = 0; i < port_width; ++i) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 350 | data = (data << 8) | *src++; |
| 351 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 352 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 353 | return (rc); |
| 354 | } |
| 355 | wp += port_width; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 356 | cnt -= port_width; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 357 | if (count++ > 0x800) { |
| 358 | spin_wheel (); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 359 | count = 0; |
| 360 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 361 | } |
| 362 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 363 | if (cnt == 0) { |
| 364 | return (0); |
| 365 | } |
| 366 | |
| 367 | /* |
| 368 | * handle unaligned tail bytes |
| 369 | */ |
| 370 | data = 0; |
| 371 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
| 372 | data = (data << 8) | *src++; |
| 373 | --cnt; |
| 374 | } |
| 375 | for (; i < port_width; ++i, ++cp) { |
| 376 | data = (data << 8) | (*(uchar *) cp); |
| 377 | } |
| 378 | |
| 379 | return (write_data (info, wp, SWAP (data))); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | /*----------------------------------------------------------------------- |
| 383 | * Write a word or halfword to Flash, returns: |
| 384 | * 0 - OK |
| 385 | * 1 - write timeout |
| 386 | * 2 - Flash not erased |
| 387 | */ |
| 388 | static int write_data (flash_info_t *info, ulong dest, FPW data) |
| 389 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 390 | FPWV *addr = (FPWV *) dest; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 391 | ulong status; |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 392 | ulong start; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 393 | |
| 394 | /* Check if Flash is (sufficiently) erased */ |
| 395 | if ((*addr & data) != data) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 396 | printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 397 | return (2); |
| 398 | } |
| 399 | /* Disable interrupts which might cause a timeout here */ |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 400 | disable_interrupts(); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 401 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 402 | *addr = (FPW) 0x00400040; /* write setup */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 403 | *addr = data; |
| 404 | |
| 405 | /* arm simple, non interrupt dependent timer */ |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 406 | start = get_timer(0); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 407 | |
| 408 | /* wait while polling the status register */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 409 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Marek Vasut | c4f4c76 | 2011-08-20 14:24:49 +0200 | [diff] [blame] | 410 | if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 411 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 412 | return (1); |
| 413 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 414 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 415 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 416 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 417 | |
| 418 | return (0); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 419 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 420 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 421 | void inline spin_wheel (void) |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 422 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 423 | static int p = 0; |
| 424 | static char w[] = "\\/-"; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 425 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 426 | printf ("\010%c", w[p]); |
| 427 | (++p == 3) ? (p = 0) : 0; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 428 | } |