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wdenkba56f622004-02-06 23:19:44 +00001/*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenkba56f622004-02-06 23:19:44 +00005 */
6
Peter Tysere0299072009-07-17 19:01:07 -05007/*
wdenkba56f622004-02-06 23:19:44 +00008 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
Wolfgang Denk0c8721a2005-09-23 11:05:55 +020011 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
Peter Tysere0299072009-07-17 19:01:07 -050012 */
wdenkba56f622004-02-06 23:19:44 +000013
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
Peter Tysere0299072009-07-17 19:01:07 -050017/* High Level Configuration Options */
Peter Tyser10c1b212009-07-17 19:01:16 -050018#define CONFIG_XPEDITE1000 1
Peter Tyser54381b72009-07-17 19:01:15 -050019#define CONFIG_SYS_BOARD_NAME "XPedite1000"
John Schmoller92af65492010-10-22 00:20:24 -050020#define CONFIG_SYS_FORM_PMC 1
wdenkba56f622004-02-06 23:19:44 +000021#define CONFIG_440 1
Stefan Roese846b0dd2005-08-08 12:42:22 +020022#define CONFIG_440GX 1 /* 440 GX */
wdenk3c74e322004-02-22 23:46:08 +000023#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
wdenkba56f622004-02-06 23:19:44 +000024#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
25
Wolfgang Denk2ae18242010-10-06 09:05:45 +020026#define CONFIG_SYS_TEXT_BASE 0xFFF80000
27
Peter Tyser4cdad5f2009-07-17 19:01:13 -050028/*
29 * DDR config
30 */
31#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
32#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
33#define CONFIG_VERY_BIG_RAM 1
wdenkba56f622004-02-06 23:19:44 +000034
Peter Tysere0299072009-07-17 19:01:07 -050035/*
wdenkba56f622004-02-06 23:19:44 +000036 * Base addresses -- Note these are effective addresses where the
37 * actual resources get mapped (not physical addresses)
Peter Tysere0299072009-07-17 19:01:07 -050038 */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050039#define CONFIG_SYS_SDRAM_BASE 0x00000000
40#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020041#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050042#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050043#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
44#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Peter Tysere0299072009-07-17 19:01:07 -050045#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
46#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
wdenkba56f622004-02-06 23:19:44 +000047
Peter Tyser4cdad5f2009-07-17 19:01:13 -050048/*
49 * Diagnostics
50 */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050051#define CONFIG_SYS_ALT_MEMTEST
Peter Tyser4cdad5f2009-07-17 19:01:13 -050052#define CONFIG_SYS_MEMTEST_START 0x0400000
53#define CONFIG_SYS_MEMTEST_END 0x0C00000
54
55/* POST support */
56#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
57 CONFIG_SYS_POST_I2C)
58
59/*
60 * LED support
61 */
Peter Tysere0299072009-07-17 19:01:07 -050062#define USR_LED0 0x00000080
63#define USR_LED1 0x00000100
64#define USR_LED2 0x00000200
65#define USR_LED3 0x00000400
wdenkba56f622004-02-06 23:19:44 +000066
67#ifndef __ASSEMBLY__
68extern unsigned long in32(unsigned int);
69extern void out32(unsigned int, unsigned long);
70
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
72#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
73#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
74#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000075
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
77#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
78#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
79#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000080#endif
81
Peter Tyser4cdad5f2009-07-17 19:01:13 -050082/*
83 * Use internal SRAM for initial stack
84 */
Peter Tysere0299072009-07-17 19:01:07 -050085#define CONFIG_SYS_TEMP_STACK_OCM 1
86#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
87#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk553f0982010-10-26 13:32:32 +020088#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020089#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +020090#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
wdenkba56f622004-02-06 23:19:44 +000091
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050092#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
93#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
wdenkba56f622004-02-06 23:19:44 +000094
Peter Tyser4cdad5f2009-07-17 19:01:13 -050095/*
96 * Serial Port
97 */
Stefan Roese550650d2010-09-20 16:05:31 +020098#define CONFIG_CONS_INDEX 1 /* Use UART0 */
99#define CONFIG_SYS_NS16550
100#define CONFIG_SYS_NS16550_SERIAL
101#define CONFIG_SYS_NS16550_REG_SIZE 1
102#define CONFIG_SYS_NS16550_CLK get_serial_clock()
103
Peter Tysere0299072009-07-17 19:01:07 -0500104#define CONFIG_SYS_BAUDRATE_TABLE \
105 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500106#define CONFIG_BAUDRATE 115200
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500107#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
108#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkba56f622004-02-06 23:19:44 +0000109
Peter Tysere0299072009-07-17 19:01:07 -0500110/*
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500111 * Use the HUSH parser
112 */
113#define CONFIG_SYS_HUSH_PARSER
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500114
115/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500116 * NOR flash configuration
Peter Tysere0299072009-07-17 19:01:07 -0500117 */
Peter Tyser42735812009-07-17 19:01:08 -0500118#define CONFIG_SYS_MAX_FLASH_BANKS 3
119#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
120#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
Peter Tyser11ad3092009-07-17 19:01:03 -0500121#define CONFIG_FLASH_CFI_DRIVER
122#define CONFIG_SYS_FLASH_CFI
123#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Peter Tyser42735812009-07-17 19:01:08 -0500124#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
Peter Tysere0299072009-07-17 19:01:07 -0500125#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
126#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkba56f622004-02-06 23:19:44 +0000127
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500128/*
129 * I2C
130 */
Dirk Eibach880540d2013-04-25 02:40:01 +0000131#define CONFIG_SYS_I2C
132#define CONFIG_SYS_I2C_PPC4XX
133#define CONFIG_SYS_I2C_PPC4XX_CH0
134#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
135#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
wdenkba56f622004-02-06 23:19:44 +0000136
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500137/* I2C EEPROM */
138#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
Peter Tysere0299072009-07-17 19:01:07 -0500139#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
140#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
141#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
wdenkba56f622004-02-06 23:19:44 +0000142
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500143/* I2C RTC: STMicro M41T00 */
144#define CONFIG_RTC_M41T11 1
145#define CONFIG_SYS_I2C_RTC_ADDR 0x68
146#define CONFIG_SYS_M41T11_BASE_YEAR 2000
wdenkba56f622004-02-06 23:19:44 +0000147
Peter Tysere0299072009-07-17 19:01:07 -0500148/*
149 * PCI
wdenkba56f622004-02-06 23:19:44 +0000150 */
151/* General PCI */
Peter Tysere0299072009-07-17 19:01:07 -0500152#define CONFIG_PCI /* include pci support */
Gabor Juhos842033e2013-05-30 07:06:12 +0000153#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Peter Tysere0299072009-07-17 19:01:07 -0500154#define CONFIG_PCI_PNP /* do pci plug-and-play */
155#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
156#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
wdenkba56f622004-02-06 23:19:44 +0000157
158/* Board-specific PCI */
Peter Tysere0299072009-07-17 19:01:07 -0500159#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
161#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Peter Tysere0299072009-07-17 19:01:07 -0500162#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
163
wdenkba56f622004-02-06 23:19:44 +0000164/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500165 * Networking options
166 */
167#define CONFIG_PPC4xx_EMAC
168#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500169#define CONFIG_MII 1 /* MII PHY management */
170#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
171#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
172#define CONFIG_ETHPRIME "ppc_4xx_eth2"
173#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
174#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
175#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
176#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
177#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
178
179/* BOOTP options */
180#define CONFIG_BOOTP_BOOTFILESIZE
181#define CONFIG_BOOTP_BOOTPATH
182#define CONFIG_BOOTP_GATEWAY
183#define CONFIG_BOOTP_HOSTNAME
184
185/*
186 * Command configuration
187 */
188#include <config_cmd_default.h>
189
190#define CONFIG_CMD_ASKENV
191#define CONFIG_CMD_DATE
192#define CONFIG_CMD_DHCP
193#define CONFIG_CMD_EEPROM
194#define CONFIG_CMD_ELF
195#define CONFIG_CMD_FLASH
196#define CONFIG_CMD_I2C
197#define CONFIG_CMD_IRQ
198#define CONFIG_CMD_JFFS2
199#define CONFIG_CMD_MII
200#define CONFIG_CMD_NET
201#define CONFIG_CMD_PCI
202#define CONFIG_CMD_PING
203#define CONFIG_CMD_SAVEENV
204#define CONFIG_CMD_SNTP
205
206/*
207 * Miscellaneous configurable options
208 */
209#define CONFIG_SYS_LONGHELP /* undef to save memory */
210#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500211#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500212#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
213#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
214#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500215#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
216#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
217#define CONFIG_PANIC_HANG /* do not reset board on panic */
218#define CONFIG_PREBOOT /* enable preboot variable */
219#define CONFIG_FIT 1
220#define CONFIG_FIT_VERBOSE 1
221#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
222#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500223
224/*
wdenkba56f622004-02-06 23:19:44 +0000225 * For booting Linux, the board info and command line data
226 * have to be in the first 8 MB of memory, since this is
227 * the maximum mapped by the Linux kernel during initialization.
228 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200229#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkba56f622004-02-06 23:19:44 +0000230
231/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500232 * Environment Configuration
233 */
234#define CONFIG_ENV_IS_IN_FLASH 1
235#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
236#define CONFIG_ENV_SIZE 0x8000
237#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
238
239/*
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500240 * Flash memory map:
241 * fff80000 - ffffffff U-Boot (512 KB)
242 * fff40000 - fff7ffff U-Boot Environment (256 KB)
243 * fff00000 - fff3ffff FDT (256KB)
244 * ffc00000 - ffefffff OS image (3MB)
245 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
246 */
247
Marek Vasut5368c552012-09-23 17:41:24 +0200248#define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
249#define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
250#define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500251
252#define CONFIG_PROG_UBOOT \
253 "$download_cmd $loadaddr $ubootfile; " \
254 "if test $? -eq 0; then " \
255 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
256 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
257 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
258 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
259 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
260 "if test $? -ne 0; then " \
261 "echo PROGRAM FAILED; " \
262 "else; " \
263 "echo PROGRAM SUCCEEDED; " \
264 "fi; " \
265 "else; " \
266 "echo DOWNLOAD FAILED; " \
267 "fi;"
268
269#define CONFIG_BOOT_OS_NET \
270 "$download_cmd $osaddr $osfile; " \
271 "if test $? -eq 0; then " \
272 "if test -n $fdtaddr; then " \
273 "$download_cmd $fdtaddr $fdtfile; " \
274 "if test $? -eq 0; then " \
275 "bootm $osaddr - $fdtaddr; " \
276 "else; " \
277 "echo FDT DOWNLOAD FAILED; " \
278 "fi; " \
279 "else; " \
280 "bootm $osaddr; " \
281 "fi; " \
282 "else; " \
283 "echo OS DOWNLOAD FAILED; " \
284 "fi;"
285
286#define CONFIG_PROG_OS \
287 "$download_cmd $osaddr $osfile; " \
288 "if test $? -eq 0; then " \
289 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
290 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
291 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
292 "if test $? -ne 0; then " \
293 "echo OS PROGRAM FAILED; " \
294 "else; " \
295 "echo OS PROGRAM SUCCEEDED; " \
296 "fi; " \
297 "else; " \
298 "echo OS DOWNLOAD FAILED; " \
299 "fi;"
300
301#define CONFIG_PROG_FDT \
302 "$download_cmd $fdtaddr $fdtfile; " \
303 "if test $? -eq 0; then " \
304 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
305 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
306 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
307 "if test $? -ne 0; then " \
308 "echo FDT PROGRAM FAILED; " \
309 "else; " \
310 "echo FDT PROGRAM SUCCEEDED; " \
311 "fi; " \
312 "else; " \
313 "echo FDT DOWNLOAD FAILED; " \
314 "fi;"
315
316#define CONFIG_EXTRA_ENV_SETTINGS \
317 "autoload=yes\0" \
318 "download_cmd=tftp\0" \
319 "console_args=console=ttyS0,115200\0" \
320 "root_args=root=/dev/nfs rw\0" \
321 "misc_args=ip=on\0" \
322 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
323 "bootfile=/home/user/file\0" \
Peter Tyserc00ac252010-10-22 00:20:26 -0500324 "osfile=/home/user/board.uImage\0" \
325 "fdtfile=/home/user/board.dtb\0" \
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500326 "ubootfile=/home/user/u-boot.bin\0" \
327 "fdtaddr=c00000\0" \
328 "osaddr=0x1000000\0" \
329 "loadaddr=0x1000000\0" \
330 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
331 "prog_os="CONFIG_PROG_OS"\0" \
332 "prog_fdt="CONFIG_PROG_FDT"\0" \
333 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
334 "bootcmd_flash=run set_bootargs; " \
335 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
336 "bootcmd=run bootcmd_flash\0"
wdenkba56f622004-02-06 23:19:44 +0000337#endif /* __CONFIG_H */