Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 Samsung Electronics |
| 3 | * Minkyu Kang <mk7.kang@samsung.com> |
| 4 | * Kyungmin Park <kyungmin.park@samsung.com> |
| 5 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 10 | #include <spi.h> |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 11 | #include <lcd.h> |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 12 | #include <asm/io.h> |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 13 | #include <asm/gpio.h> |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 14 | #include <asm/arch/adc.h> |
| 15 | #include <asm/arch/gpio.h> |
Piotr Wilczek | ea7991b | 2012-09-20 00:19:59 +0000 | [diff] [blame] | 16 | #include <asm/arch/pinmux.h> |
Piotr Wilczek | 11a4479 | 2012-09-20 00:20:00 +0000 | [diff] [blame] | 17 | #include <asm/arch/watchdog.h> |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 18 | #include <ld9040.h> |
Łukasz Majewski | c733681 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 19 | #include <power/pmic.h> |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 20 | #include <usb.h> |
Lukasz Majewski | ddc7e54 | 2011-12-15 10:32:12 +0100 | [diff] [blame] | 21 | #include <usb/s3c_udc.h> |
| 22 | #include <asm/arch/cpu.h> |
Łukasz Majewski | c733681 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 23 | #include <power/max8998_pmic.h> |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 24 | #include <libtizen.h> |
Przemyslaw Marczak | 82b0a055 | 2014-01-22 11:24:20 +0100 | [diff] [blame] | 25 | #include <samsung/misc.h> |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 26 | #include <usb_mass_storage.h> |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 27 | |
| 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 30 | unsigned int board_rev; |
| 31 | |
| 32 | u32 get_board_rev(void) |
| 33 | { |
| 34 | return board_rev; |
| 35 | } |
| 36 | |
| 37 | static int get_hwrev(void) |
| 38 | { |
| 39 | return board_rev & 0xFF; |
| 40 | } |
| 41 | |
Minkyu Kang | 48e91ca | 2012-12-09 20:50:11 +0000 | [diff] [blame] | 42 | static void init_pmic_lcd(void); |
| 43 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 44 | int exynos_power_init(void) |
Łukasz Majewski | f5a7004 | 2012-11-13 03:22:17 +0000 | [diff] [blame] | 45 | { |
| 46 | int ret; |
| 47 | |
Łukasz Majewski | 2936df1 | 2013-08-16 15:33:33 +0200 | [diff] [blame] | 48 | /* |
| 49 | * For PMIC the I2C bus is named as I2C5, but it is connected |
| 50 | * to logical I2C adapter 0 |
| 51 | */ |
Piotr Wilczek | c47817b | 2014-01-14 08:15:07 +0100 | [diff] [blame] | 52 | ret = pmic_init(I2C_0); |
Łukasz Majewski | f5a7004 | 2012-11-13 03:22:17 +0000 | [diff] [blame] | 53 | if (ret) |
| 54 | return ret; |
| 55 | |
Minkyu Kang | 48e91ca | 2012-12-09 20:50:11 +0000 | [diff] [blame] | 56 | init_pmic_lcd(); |
| 57 | |
Łukasz Majewski | f5a7004 | 2012-11-13 03:22:17 +0000 | [diff] [blame] | 58 | return 0; |
| 59 | } |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 60 | |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 61 | static unsigned short get_adc_value(int channel) |
| 62 | { |
| 63 | struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); |
| 64 | unsigned short ret = 0; |
| 65 | unsigned int reg; |
| 66 | unsigned int loop = 0; |
| 67 | |
| 68 | writel(channel & 0xF, &adc->adcmux); |
| 69 | writel((1 << 14) | (49 << 6), &adc->adccon); |
| 70 | writel(1000 & 0xffff, &adc->adcdly); |
| 71 | writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ |
| 72 | udelay(10); |
| 73 | writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ |
| 74 | udelay(10); |
| 75 | |
| 76 | do { |
| 77 | udelay(1); |
| 78 | reg = readl(&adc->adccon); |
| 79 | } while (!(reg & (1 << 15)) && (loop++ < 1000)); |
| 80 | |
| 81 | ret = readl(&adc->adcdat0) & 0xFFF; |
| 82 | |
| 83 | return ret; |
| 84 | } |
| 85 | |
Łukasz Majewski | 4d86bf0 | 2012-03-26 21:53:48 +0000 | [diff] [blame] | 86 | static int adc_power_control(int on) |
| 87 | { |
| 88 | int ret; |
Łukasz Majewski | c733681 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 89 | struct pmic *p = pmic_get("MAX8998_PMIC"); |
| 90 | if (!p) |
| 91 | return -ENODEV; |
Łukasz Majewski | 4d86bf0 | 2012-03-26 21:53:48 +0000 | [diff] [blame] | 92 | |
| 93 | if (pmic_probe(p)) |
| 94 | return -1; |
| 95 | |
| 96 | ret = pmic_set_output(p, |
| 97 | MAX8998_REG_ONOFF1, |
| 98 | MAX8998_LDO4, !!on); |
| 99 | |
| 100 | return ret; |
| 101 | } |
| 102 | |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 103 | static unsigned int get_hw_revision(void) |
| 104 | { |
| 105 | int hwrev, mode0, mode1; |
| 106 | |
Łukasz Majewski | 4d86bf0 | 2012-03-26 21:53:48 +0000 | [diff] [blame] | 107 | adc_power_control(1); |
| 108 | |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 109 | mode0 = get_adc_value(1); /* HWREV_MODE0 */ |
| 110 | mode1 = get_adc_value(2); /* HWREV_MODE1 */ |
| 111 | |
| 112 | /* |
| 113 | * XXX Always set the default hwrev as the latest board |
| 114 | * ADC = (voltage) / 3.3 * 4096 |
| 115 | */ |
| 116 | hwrev = 3; |
| 117 | |
| 118 | #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max)) |
| 119 | if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) |
| 120 | hwrev = 0x0; /* 0.01V 0.01V */ |
| 121 | if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) |
| 122 | hwrev = 0x1; /* 610mV 0.01V */ |
| 123 | if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) |
| 124 | hwrev = 0x2; /* 1.16V 0.01V */ |
| 125 | if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) |
| 126 | hwrev = 0x3; /* 1.79V 0.01V */ |
| 127 | #undef IS_RANGE |
| 128 | |
| 129 | debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); |
| 130 | |
Łukasz Majewski | 4d86bf0 | 2012-03-26 21:53:48 +0000 | [diff] [blame] | 131 | adc_power_control(0); |
| 132 | |
Minkyu Kang | 9e40808 | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 133 | return hwrev; |
| 134 | } |
| 135 | |
| 136 | static void check_hw_revision(void) |
| 137 | { |
| 138 | int hwrev; |
| 139 | |
| 140 | hwrev = get_hw_revision(); |
| 141 | |
| 142 | board_rev |= hwrev; |
| 143 | } |
| 144 | |
Lukasz Majewski | ddc7e54 | 2011-12-15 10:32:12 +0100 | [diff] [blame] | 145 | #ifdef CONFIG_USB_GADGET |
| 146 | static int s5pc210_phy_control(int on) |
| 147 | { |
Anatolij Gustschin | e03492c | 2011-12-19 04:20:04 +0000 | [diff] [blame] | 148 | int ret = 0; |
Łukasz Majewski | c733681 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 149 | struct pmic *p = pmic_get("MAX8998_PMIC"); |
| 150 | if (!p) |
| 151 | return -ENODEV; |
Lukasz Majewski | ddc7e54 | 2011-12-15 10:32:12 +0100 | [diff] [blame] | 152 | |
| 153 | if (pmic_probe(p)) |
| 154 | return -1; |
| 155 | |
| 156 | if (on) { |
| 157 | ret |= pmic_set_output(p, |
| 158 | MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, |
| 159 | MAX8998_SAFEOUT1, LDO_ON); |
| 160 | ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, |
| 161 | MAX8998_LDO3, LDO_ON); |
| 162 | ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, |
| 163 | MAX8998_LDO8, LDO_ON); |
| 164 | |
| 165 | } else { |
| 166 | ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, |
| 167 | MAX8998_LDO8, LDO_OFF); |
| 168 | ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, |
| 169 | MAX8998_LDO3, LDO_OFF); |
| 170 | ret |= pmic_set_output(p, |
| 171 | MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, |
| 172 | MAX8998_SAFEOUT1, LDO_OFF); |
| 173 | } |
| 174 | |
| 175 | if (ret) { |
| 176 | puts("MAX8998 LDO setting error!\n"); |
| 177 | return -1; |
| 178 | } |
| 179 | |
| 180 | return 0; |
| 181 | } |
| 182 | |
| 183 | struct s3c_plat_otg_data s5pc210_otg_data = { |
| 184 | .phy_control = s5pc210_phy_control, |
| 185 | .regs_phy = EXYNOS4_USBPHY_BASE, |
| 186 | .regs_otg = EXYNOS4_USBOTG_BASE, |
| 187 | .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL, |
| 188 | .usb_flags = PHY0_SLEEP, |
| 189 | }; |
| 190 | #endif |
Piotr Wilczek | 11a4479 | 2012-09-20 00:20:00 +0000 | [diff] [blame] | 191 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 192 | int board_usb_init(int index, enum usb_init_type init) |
| 193 | { |
| 194 | debug("USB_udc_probe\n"); |
| 195 | return s3c_udc_probe(&s5pc210_otg_data); |
| 196 | } |
| 197 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 198 | int exynos_early_init_f(void) |
Piotr Wilczek | 11a4479 | 2012-09-20 00:20:00 +0000 | [diff] [blame] | 199 | { |
| 200 | wdt_stop(); |
| 201 | |
| 202 | return 0; |
| 203 | } |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 204 | |
| 205 | #ifdef CONFIG_SOFT_SPI |
| 206 | static void soft_spi_init(void) |
| 207 | { |
| 208 | gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK, |
| 209 | CONFIG_SOFT_SPI_MODE & SPI_CPOL); |
| 210 | gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1); |
| 211 | gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO); |
| 212 | gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS, |
| 213 | !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); |
| 214 | } |
| 215 | |
| 216 | void spi_cs_activate(struct spi_slave *slave) |
| 217 | { |
| 218 | gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, |
| 219 | !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); |
| 220 | SPI_SCL(1); |
| 221 | gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, |
| 222 | CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH); |
| 223 | } |
| 224 | |
| 225 | void spi_cs_deactivate(struct spi_slave *slave) |
| 226 | { |
| 227 | gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, |
| 228 | !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); |
| 229 | } |
| 230 | |
| 231 | int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
| 232 | { |
| 233 | return bus == 0 && cs == 0; |
| 234 | } |
| 235 | |
| 236 | void universal_spi_scl(int bit) |
| 237 | { |
| 238 | gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit); |
| 239 | } |
| 240 | |
| 241 | void universal_spi_sda(int bit) |
| 242 | { |
| 243 | gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit); |
| 244 | } |
| 245 | |
| 246 | int universal_spi_read(void) |
| 247 | { |
| 248 | return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO); |
| 249 | } |
| 250 | #endif |
| 251 | |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 252 | static void init_pmic_lcd(void) |
| 253 | { |
| 254 | unsigned char val; |
| 255 | int ret = 0; |
| 256 | |
Minkyu Kang | 48e91ca | 2012-12-09 20:50:11 +0000 | [diff] [blame] | 257 | struct pmic *p = pmic_get("MAX8998_PMIC"); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 258 | |
Minkyu Kang | fbef8e6 | 2012-12-10 22:43:57 +0900 | [diff] [blame] | 259 | if (!p) |
| 260 | return; |
| 261 | |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 262 | if (pmic_probe(p)) |
| 263 | return; |
| 264 | |
| 265 | /* LDO7 1.8V */ |
| 266 | val = 0x02; /* (1800 - 1600) / 100; */ |
| 267 | ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val); |
| 268 | |
| 269 | /* LDO17 3.0V */ |
| 270 | val = 0xe; /* (3000 - 1600) / 100; */ |
| 271 | ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val); |
| 272 | |
| 273 | /* Disable unneeded regulators */ |
| 274 | /* |
| 275 | * ONOFF1 |
| 276 | * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON |
| 277 | * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON |
| 278 | */ |
| 279 | val = 0xB9; |
| 280 | ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val); |
| 281 | |
| 282 | /* ONOFF2 |
| 283 | * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON, |
| 284 | * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF |
| 285 | */ |
| 286 | val = 0x50; |
| 287 | ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val); |
| 288 | |
| 289 | /* ONOFF3 |
| 290 | * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF |
| 291 | * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF |
| 292 | */ |
| 293 | val = 0x00; |
| 294 | ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val); |
| 295 | |
| 296 | if (ret) |
| 297 | puts("LCD pmic initialisation error!\n"); |
| 298 | } |
| 299 | |
Ajay Kumar | 29fd570 | 2013-02-21 23:52:57 +0000 | [diff] [blame] | 300 | void exynos_cfg_lcd_gpio(void) |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 301 | { |
| 302 | unsigned int i, f3_end = 4; |
| 303 | |
| 304 | for (i = 0; i < 8; i++) { |
| 305 | /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 306 | gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2)); |
| 307 | gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2)); |
| 308 | gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2)); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 309 | /* pull-up/down disable */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 310 | gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE); |
| 311 | gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE); |
| 312 | gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 313 | |
| 314 | /* drive strength to max (24bit) */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 315 | gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X); |
| 316 | gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); |
| 317 | gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X); |
| 318 | gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW); |
| 319 | gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X); |
| 320 | gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 321 | } |
| 322 | |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 323 | for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) { |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 324 | /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 325 | gpio_cfg_pin(i, S5P_GPIO_FUNC(2)); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 326 | /* pull-up/down disable */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 327 | gpio_set_pull(i, S5P_GPIO_PULL_NONE); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 328 | /* drive strength to max (24bit) */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 329 | gpio_set_drv(i, S5P_GPIO_DRV_4X); |
| 330 | gpio_set_rate(i, S5P_GPIO_DRV_SLOW); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | /* gpio pad configuration for LCD reset. */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 334 | gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 335 | |
| 336 | spi_init(); |
| 337 | } |
| 338 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 339 | int mipi_power(void) |
| 340 | { |
| 341 | return 0; |
| 342 | } |
| 343 | |
Ajay Kumar | 29fd570 | 2013-02-21 23:52:57 +0000 | [diff] [blame] | 344 | void exynos_reset_lcd(void) |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 345 | { |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 346 | gpio_set_value(EXYNOS4_GPIO_Y45, 1); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 347 | udelay(10000); |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 348 | gpio_set_value(EXYNOS4_GPIO_Y45, 0); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 349 | udelay(10000); |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 350 | gpio_set_value(EXYNOS4_GPIO_Y45, 1); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 351 | udelay(100); |
| 352 | } |
| 353 | |
Ajay Kumar | 29fd570 | 2013-02-21 23:52:57 +0000 | [diff] [blame] | 354 | void exynos_lcd_power_on(void) |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 355 | { |
Minkyu Kang | 48e91ca | 2012-12-09 20:50:11 +0000 | [diff] [blame] | 356 | struct pmic *p = pmic_get("MAX8998_PMIC"); |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 357 | |
Minkyu Kang | fbef8e6 | 2012-12-10 22:43:57 +0900 | [diff] [blame] | 358 | if (!p) |
| 359 | return; |
| 360 | |
Piotr Wilczek | d984b9f | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 361 | if (pmic_probe(p)) |
| 362 | return; |
| 363 | |
| 364 | pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON); |
| 365 | pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON); |
| 366 | } |
| 367 | |
Ajay Kumar | 29fd570 | 2013-02-21 23:52:57 +0000 | [diff] [blame] | 368 | void exynos_cfg_ldo(void) |
| 369 | { |
| 370 | ld9040_cfg_ldo(); |
| 371 | } |
| 372 | |
| 373 | void exynos_enable_ldo(unsigned int onoff) |
| 374 | { |
| 375 | ld9040_enable_ldo(onoff); |
| 376 | } |
| 377 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 378 | int exynos_init(void) |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 379 | { |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 380 | gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 381 | |
| 382 | switch (get_hwrev()) { |
| 383 | case 0: |
| 384 | /* |
| 385 | * Set the low to enable LDO_EN |
| 386 | * But when you use the test board for eMMC booting |
| 387 | * you should set it HIGH since it removes the inverter |
| 388 | */ |
| 389 | /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 390 | gpio_direction_output(EXYNOS4_GPIO_E36, 0); |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 391 | break; |
| 392 | default: |
| 393 | /* |
| 394 | * Default reset state is High and there's no inverter |
| 395 | * But set it as HIGH to ensure |
| 396 | */ |
| 397 | /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ |
Akshay Saraswat | f6ae1ca | 2014-05-13 10:30:14 +0530 | [diff] [blame] | 398 | gpio_direction_output(EXYNOS4_GPIO_E13, 1); |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 399 | break; |
| 400 | } |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 401 | |
Piotr Wilczek | ff0fedd | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 402 | #ifdef CONFIG_SOFT_SPI |
| 403 | soft_spi_init(); |
| 404 | #endif |
| 405 | check_hw_revision(); |
| 406 | printf("HW Revision:\t0x%x\n", board_rev); |
| 407 | |
| 408 | return 0; |
| 409 | } |
Przemyslaw Marczak | 679549d | 2014-01-22 11:24:12 +0100 | [diff] [blame] | 410 | |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 411 | void exynos_lcd_misc_init(vidinfo_t *vid) |
Przemyslaw Marczak | 679549d | 2014-01-22 11:24:12 +0100 | [diff] [blame] | 412 | { |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 413 | #ifdef CONFIG_TIZEN |
| 414 | get_tizen_logo_info(vid); |
Piotr Wilczek | 815a607 | 2014-01-22 15:54:34 +0100 | [diff] [blame] | 415 | #endif |
Piotr Wilczek | 3f41ffe | 2014-03-07 14:59:47 +0100 | [diff] [blame] | 416 | |
| 417 | /* for LD9040. */ |
| 418 | vid->pclk_name = 1; /* MPLL */ |
| 419 | vid->sclk_div = 1; |
| 420 | |
| 421 | setenv("lcdinfo", "lcd=ld9040"); |
Przemyslaw Marczak | 679549d | 2014-01-22 11:24:12 +0100 | [diff] [blame] | 422 | } |