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Wolfgang Denkad5bb452007-03-06 18:08:43 +01001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26/*
27 * CPU test
28 *
29 * This test checks the arithmetic logic unit (ALU) of CPU.
30 * It tests independently various groups of instructions using
31 * run-time modification of the code to reduce the memory footprint.
32 * For more details refer to post/cpu/ *.c files.
33 */
34
35#ifdef CONFIG_POST
36
37#include <watchdog.h>
38#include <post.h>
Stefan Roese3db93b82007-10-31 20:51:10 +010039#include <asm/mmu.h>
Wolfgang Denkad5bb452007-03-06 18:08:43 +010040
41#if CONFIG_POST & CFG_POST_CPU
42
43extern int cpu_post_test_cmp (void);
44extern int cpu_post_test_cmpi (void);
45extern int cpu_post_test_two (void);
46extern int cpu_post_test_twox (void);
47extern int cpu_post_test_three (void);
48extern int cpu_post_test_threex (void);
49extern int cpu_post_test_threei (void);
50extern int cpu_post_test_andi (void);
51extern int cpu_post_test_srawi (void);
52extern int cpu_post_test_rlwnm (void);
53extern int cpu_post_test_rlwinm (void);
54extern int cpu_post_test_rlwimi (void);
55extern int cpu_post_test_store (void);
56extern int cpu_post_test_load (void);
57extern int cpu_post_test_cr (void);
58extern int cpu_post_test_b (void);
59extern int cpu_post_test_multi (void);
60extern int cpu_post_test_string (void);
61extern int cpu_post_test_complex (void);
62
Stefan Roese3db93b82007-10-31 20:51:10 +010063DECLARE_GLOBAL_DATA_PTR;
64
Wolfgang Denkad5bb452007-03-06 18:08:43 +010065ulong cpu_post_makecr (long v)
66{
67 ulong cr = 0;
68
69 if (v < 0)
70 cr |= 0x80000000;
71 if (v > 0)
72 cr |= 0x40000000;
73 if (v == 0)
74 cr |= 0x20000000;
75
76 return cr;
77}
78
79int cpu_post_test (int flags)
80{
81 int ic = icache_status ();
82 int ret = 0;
83
84 WATCHDOG_RESET();
85 if (ic)
86 icache_disable ();
Stefan Roese3db93b82007-10-31 20:51:10 +010087#ifdef CONFIG_4xx_DCACHE
88 /* disable cache */
89 change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, TLB_WORD2_I_ENABLE);
90#endif
Wolfgang Denkad5bb452007-03-06 18:08:43 +010091
92 if (ret == 0)
93 ret = cpu_post_test_cmp ();
94 if (ret == 0)
95 ret = cpu_post_test_cmpi ();
96 if (ret == 0)
97 ret = cpu_post_test_two ();
98 if (ret == 0)
99 ret = cpu_post_test_twox ();
100 WATCHDOG_RESET();
101 if (ret == 0)
102 ret = cpu_post_test_three ();
103 if (ret == 0)
104 ret = cpu_post_test_threex ();
105 if (ret == 0)
106 ret = cpu_post_test_threei ();
107 if (ret == 0)
108 ret = cpu_post_test_andi ();
109 WATCHDOG_RESET();
110 if (ret == 0)
111 ret = cpu_post_test_srawi ();
112 if (ret == 0)
113 ret = cpu_post_test_rlwnm ();
114 if (ret == 0)
115 ret = cpu_post_test_rlwinm ();
116 if (ret == 0)
117 ret = cpu_post_test_rlwimi ();
118 WATCHDOG_RESET();
119 if (ret == 0)
120 ret = cpu_post_test_store ();
121 if (ret == 0)
122 ret = cpu_post_test_load ();
123 if (ret == 0)
124 ret = cpu_post_test_cr ();
125 if (ret == 0)
126 ret = cpu_post_test_b ();
127 WATCHDOG_RESET();
128 if (ret == 0)
129 ret = cpu_post_test_multi ();
130 WATCHDOG_RESET();
131 if (ret == 0)
132 ret = cpu_post_test_string ();
133 if (ret == 0)
134 ret = cpu_post_test_complex ();
135 WATCHDOG_RESET();
136
137 if (ic)
138 icache_enable ();
Stefan Roese3db93b82007-10-31 20:51:10 +0100139#ifdef CONFIG_4xx_DCACHE
140 /* enable cache */
141 change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, 0);
142#endif
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100143
144 WATCHDOG_RESET();
145
146 return ret;
147}
148
149#endif /* CONFIG_POST & CFG_POST_CPU */
150#endif /* CONFIG_POST */