blob: 0a00db361798d17dfdf666b73b9834a1afbeda60 [file] [log] [blame]
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +09001/*
2 * linux/include/asm-sh/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 */
20#ifndef __ASM_SH_IO_H
21#define __ASM_SH_IO_H
22
23#ifdef __KERNEL__
24
25#include <linux/types.h>
26#include <asm/byteorder.h>
27
28/*
29 * Generic virtual read/write. Note that we don't support half-word
30 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
31 * to the architecture specific code.
32 */
33#define __arch_getb(a) (*(volatile unsigned char *)(a))
34#define __arch_getw(a) (*(volatile unsigned short *)(a))
35#define __arch_getl(a) (*(volatile unsigned int *)(a))
36
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +090037#define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v))
38#define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v))
39#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v))
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090040
41extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
42extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
43extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
44
45extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
46extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
47extern void __raw_readsl(unsigned int addr, void *data, int longlen);
48
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +090049#define __raw_writeb(v, a) __arch_putb(v, a)
50#define __raw_writew(v, a) __arch_putw(v, a)
51#define __raw_writel(v, a) __arch_putl(v, a)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090052
53#define __raw_readb(a) __arch_getb(a)
54#define __raw_readw(a) __arch_getw(a)
55#define __raw_readl(a) __arch_getl(a)
56
57/*
58 * The compiler seems to be incapable of optimising constants
59 * properly. Spell it out to the compiler in some cases.
60 * These are only valid for small values of "off" (< 1<<12)
61 */
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +090062#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
63#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
64#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090065
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +090066#define __raw_base_readb(base, off) __arch_base_getb(base, off)
67#define __raw_base_readw(base, off) __arch_base_getw(base, off)
68#define __raw_base_readl(base, off) __arch_base_getl(base, off)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090069
70/*
71 * Now, pick up the machine-defined IO definitions
72 */
73#if 0 /* XXX###XXX */
74#include <asm/arch/io.h>
75#endif /* XXX###XXX */
76
77/*
78 * IO port access primitives
79 * -------------------------
80 *
81 * The SH doesn't have special IO access instructions; all IO is memory
82 * mapped. Note that these are defined to perform little endian accesses
83 * only. Their primary purpose is to access PCI and ISA peripherals.
84 *
85 * The machine specific io.h include defines __io to translate an "IO"
86 * address to a memory address.
87 *
88 * Note that we prevent GCC re-ordering or caching values in expressions
89 * by introducing sequence points into the in*() definitions. Note that
90 * __raw_* do not guarantee this behaviour.
91 *
92 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
93 */
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +090094#define outb(v, p) __raw_writeb(v, p)
95#define outw(v, p) __raw_writew(cpu_to_le16(v), p)
96#define outl(v, p) __raw_writel(cpu_to_le32(v), p)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090097
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090098#define inb(p) ({ unsigned int __v = __raw_readb(p); __v; })
99#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
100#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900101
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900102#define outsb(p, d, l) __raw_writesb(p, d, l)
103#define outsw(p, d, l) __raw_writesw(p, d, l)
104#define outsl(p, d, l) __raw_writesl(p, d, l)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900105
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900106#define insb(p, d, l) __raw_readsb(p, d, l)
107#define insw(p, d, l) __raw_readsw(p, d, l)
108#define insl(p, d, l) __raw_readsl(p, d, l)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900109
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900110#define outb_p(val, port) outb((val), (port))
111#define outw_p(val, port) outw((val), (port))
112#define outl_p(val, port) outl((val), (port))
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900113#define inb_p(port) inb((port))
114#define inw_p(port) inw((port))
115#define inl_p(port) inl((port))
116
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900117#define outsb_p(port, from, len) outsb(port, from, len)
118#define outsw_p(port, from, len) outsw(port, from, len)
119#define outsl_p(port, from, len) outsl(port, from, len)
120#define insb_p(port, to, len) insb(port, to, len)
121#define insw_p(port, to, len) insw(port, to, len)
122#define insl_p(port, to, len) insl(port, to, len)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900123
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900124/* for U-Boot PCI */
125#define out_8(port, val) outb(val, port)
126#define out_le16(port, val) outw(val, port)
127#define out_le32(port, val) outl(val, port)
128#define in_8(port) inb(port)
129#define in_le16(port) inw(port)
130#define in_le32(port) inl(port)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900131/*
132 * ioremap and friends.
133 *
134 * ioremap takes a PCI memory address, as specified in
135 * linux/Documentation/IO-mapping.txt. If you want a
136 * physical address, use __ioremap instead.
137 */
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900138extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900139extern void __iounmap(void *addr);
140
141/*
142 * Generic ioremap support.
143 *
144 * Define:
145 * iomem_valid_addr(off,size)
146 * iomem_to_phys(off)
147 */
148#ifdef iomem_valid_addr
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900149#define __arch_ioremap(off, sz, nocache) \
Nobuhiro Iwamatsu1379c512012-02-15 16:47:01 +0900150({ \
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900151 unsigned long _off = (off), _size = (sz); \
152 void *_ret = (void *)0; \
153 if (iomem_valid_addr(_off, _size)) \
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900154 _ret = __ioremap(iomem_to_phys(_off), _size, 0); \
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900155 _ret; \
Nobuhiro Iwamatsu1379c512012-02-15 16:47:01 +0900156})
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900157
158#define __arch_iounmap __iounmap
159#endif
160
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900161#define ioremap(off, sz) __arch_ioremap((off), (sz), 0)
162#define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900163#define iounmap(_addr) __arch_iounmap(_addr)
164
165/*
166 * DMA-consistent mapping functions. These allocate/free a region of
167 * uncached, unwrite-buffered mapped memory space for use with DMA
168 * devices. This is the "generic" version. The PCI specific version
169 * is in pci.h
170 */
171extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
172extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
173extern void consistent_sync(void *vaddr, size_t size, int rw);
174
175/*
176 * String version of IO memory access ops:
177 */
178extern void _memcpy_fromio(void *, unsigned long, size_t);
179extern void _memcpy_toio(unsigned long, const void *, size_t);
180extern void _memset_io(unsigned long, int, size_t);
181
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900182/*
183 * If this architecture has PCI memory IO, then define the read/write
184 * macros. These should only be used with the cookie passed from
185 * ioremap.
186 */
187#ifdef __mem_pci
188
189#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900190#define readw(c)\
191 ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
192#define readl(c)\
193 ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900194
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900195#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
196#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
197#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900198
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900199#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
200#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
201#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900202
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900203#define eth_io_copy_and_sum(s, c, l, b) \
204 eth_copy_and_sum((s), __mem_pci(c), (l), (b))
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900205
206static inline int
207check_signature(unsigned long io_addr, const unsigned char *signature,
208 int length)
209{
210 int retval = 0;
211 do {
212 if (readb(io_addr) != *signature)
213 goto out;
214 io_addr++;
215 signature++;
216 length--;
217 } while (length);
218 retval = 1;
219out:
220 return retval;
221}
222
223#elif !defined(readb)
224
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +0900225#define readb(addr) __raw_readb(addr)
226#define readw(addr) __raw_readw(addr)
227#define readl(addr) __raw_readl(addr)
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900228#define writeb(v, addr) __raw_writeb(v, addr)
229#define writew(v, addr) __raw_writew(v, addr)
230#define writel(v, addr) __raw_writel(v, addr)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900231
Nobuhiro Iwamatsub5d10a12008-09-18 19:34:36 +0900232#define check_signature(io, sig, len) (0)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900233
234#endif /* __mem_pci */
235
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900236static inline void sync(void)
237{
238}
Nobuhiro Iwamatsu63a11be2008-01-15 23:06:17 +0900239
240/*
Nobuhiro Iwamatsu1379c512012-02-15 16:47:01 +0900241 * Clear and set bits in one shot. These macros can be used to clear and
242 * set multiple bits in a register using a single call. These macros can
243 * also be used to set a multiple-bit bit pattern using a mask, by
244 * specifying the mask in the 'clear' parameter and the new bit pattern
245 * in the 'set' parameter.
246 */
247
248#define clrbits(type, addr, clear) \
249 out_##type((addr), in_##type(addr) & ~(clear))
250
251#define setbits(type, addr, set) \
252 out_##type((addr), in_##type(addr) | (set))
253
254#define clrsetbits(type, addr, clear, set) \
255 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
256
257#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
258#define setbits_be32(addr, set) setbits(be32, addr, set)
259#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
260
261#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
262#define setbits_le32(addr, set) setbits(le32, addr, set)
263#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
264
265#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
266#define setbits_be16(addr, set) setbits(be16, addr, set)
267#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
268
269#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
270#define setbits_le16(addr, set) setbits(le16, addr, set)
271#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
272
273#define clrbits_8(addr, clear) clrbits(8, addr, clear)
274#define setbits_8(addr, set) setbits(8, addr, set)
275#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
276
277/*
Nobuhiro Iwamatsu63a11be2008-01-15 23:06:17 +0900278 * Given a physical address and a length, return a virtual address
279 * that can be used to access the memory range with the caching
280 * properties specified by "flags".
281 */
Nobuhiro Iwamatsu63a11be2008-01-15 23:06:17 +0900282#define MAP_NOCACHE (0)
283#define MAP_WRCOMBINE (0)
284#define MAP_WRBACK (0)
285#define MAP_WRTHROUGH (0)
286
287static inline void *
288map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
289{
290 return (void *)paddr;
291}
292
293/*
294 * Take down a mapping set up by map_physmem().
295 */
296static inline void unmap_physmem(void *vaddr, unsigned long flags)
297{
298
299}
300
Nobuhiro Iwamatsu1379c512012-02-15 16:47:01 +0900301static inline phys_addr_t virt_to_phys(void *vaddr)
Kumar Gala65e43a12008-12-13 17:20:27 -0600302{
303 return (phys_addr_t)(vaddr);
304}
305
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +0900306#endif /* __KERNEL__ */
307#endif /* __ASM_SH_IO_H */