| Kumar Gala | af04247 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <config.h> |
| 24 | #include <common.h> |
| 25 | #include <asm/io.h> |
| 26 | #include <asm/immap_86xx.h> |
| 27 | #include <asm/fsl_serdes.h> |
| 28 | |
| 29 | #define SRDS1_MAX_LANES 4 |
| 30 | #define SRDS2_MAX_LANES 4 |
| 31 | |
| 32 | static u32 serdes1_prtcl_map, serdes2_prtcl_map; |
| 33 | |
| 34 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
| 35 | [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 36 | [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 37 | [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 38 | [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 39 | [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 40 | [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 41 | }; |
| 42 | |
| 43 | static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { |
| 44 | [0x3] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 45 | [0x5] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 46 | [0x6] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 47 | [0x7] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 48 | [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 49 | [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 50 | [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 51 | [0xe] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 52 | [0xf] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 53 | }; |
| 54 | |
| 55 | int is_serdes_configured(enum srds_prtcl device) |
| 56 | { |
| 57 | int ret = (1 << device) & serdes1_prtcl_map; |
| 58 | |
| 59 | if (ret) |
| 60 | return ret; |
| 61 | |
| 62 | return (1 << device) & serdes2_prtcl_map; |
| 63 | } |
| 64 | |
| 65 | void fsl_serdes_init(void) |
| 66 | { |
| 67 | immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; |
| 68 | ccsr_gur_t *gur = &immap->im_gur; |
| 69 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 70 | u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >> |
| 71 | MPC8641_PORDEVSR_IO_SEL_SHIFT; |
| 72 | int lane; |
| 73 | |
| 74 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
| 75 | |
| 76 | if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { |
| 77 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 78 | return; |
| 79 | } |
| 80 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
| 81 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
| 82 | serdes1_prtcl_map |= (1 << lane_prtcl); |
| 83 | } |
| 84 | |
| 85 | if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { |
| 86 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 87 | return; |
| 88 | } |
| 89 | |
| 90 | for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { |
| 91 | enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; |
| 92 | serdes2_prtcl_map |= (1 << lane_prtcl); |
| 93 | } |
| 94 | } |