| Matthias Weisser | 7a619ab | 2011-08-01 05:11:52 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c |
| 3 | * |
| 4 | * This program is used to generate definitions needed by |
| 5 | * assembly language modules. |
| 6 | * |
| 7 | * We use the technique used in the OSF Mach kernel code: |
| 8 | * generate asm statements containing #defines, |
| 9 | * compile this file to assembler, and then extract the |
| 10 | * #defines from the assembly-language output. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License |
| 14 | * as published by the Free Software Foundation; either version |
| 15 | * 2 of the License, or (at your option) any later version. |
| 16 | */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #include <asm/arch/mb86r0x.h> |
| 20 | |
| 21 | #include <linux/kbuild.h> |
| 22 | |
| 23 | int main(void) |
| 24 | { |
| 25 | /* ddr2 controller */ |
| 26 | DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric)); |
| 27 | DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1)); |
| 28 | DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2)); |
| 29 | DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca)); |
| 30 | DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm)); |
| 31 | DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1)); |
| 32 | DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2)); |
| 33 | DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr)); |
| 34 | DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf)); |
| 35 | DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr)); |
| 36 | DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims)); |
| 37 | DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros)); |
| 38 | DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1)); |
| 39 | DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba)); |
| 40 | DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs)); |
| 41 | |
| 42 | /* clock reset generator */ |
| 43 | DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr)); |
| 44 | DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha)); |
| 45 | DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa)); |
| 46 | DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb)); |
| 47 | DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb)); |
| 48 | DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram)); |
| 49 | |
| 50 | /* chip control module */ |
| 51 | DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc)); |
| 52 | |
| 53 | /* external bus interface */ |
| 54 | DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0])); |
| 55 | DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2])); |
| 56 | DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4])); |
| 57 | DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0])); |
| 58 | DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2])); |
| 59 | DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4])); |
| 60 | DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0])); |
| 61 | DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2])); |
| 62 | DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4])); |
| 63 | |
| 64 | return 0; |
| 65 | } |