Jagan Teki | de82305 | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 1 | menu "SPI Support" |
| 2 | |
Masahiro Yamada | da333ae | 2014-10-23 22:26:09 +0900 | [diff] [blame] | 3 | config DM_SPI |
| 4 | bool "Enable Driver Model for SPI drivers" |
| 5 | depends on DM |
| 6 | help |
Simon Glass | f94a1be | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 7 | Enable driver model for SPI. The SPI slave interface |
| 8 | (spi_setup_slave(), spi_xfer(), etc.) is then implemented by |
| 9 | the SPI uclass. Drivers provide methods to access the SPI |
| 10 | buses that they control. The uclass interface is defined in |
| 11 | include/spi.h. The existing spi_slave structure is attached |
| 12 | as 'parent data' to every slave on each bus. Slaves |
| 13 | typically use driver-private data instead of extending the |
| 14 | spi_slave structure. |
Simon Glass | 892cac7 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 15 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 16 | if DM_SPI |
| 17 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 18 | config ALTERA_SPI |
| 19 | bool "Altera SPI driver" |
| 20 | help |
| 21 | Enable the Altera SPI driver. This driver can be used to |
| 22 | access the SPI NOR flash on platforms embedding this Altera |
| 23 | IP core. Please find details on the "Embedded Peripherals IP |
| 24 | User Guide" of Altera. |
| 25 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 26 | config CADENCE_QSPI |
| 27 | bool "Cadence QSPI driver" |
| 28 | help |
| 29 | Enable the Cadence Quad-SPI (QSPI) driver. This driver can be |
| 30 | used to access the SPI NOR flash on platforms embedding this |
| 31 | Cadence IP core. |
| 32 | |
| 33 | config DESIGNWARE_SPI |
| 34 | bool "Designware SPI driver" |
| 35 | help |
| 36 | Enable the Designware SPI driver. This driver can be used to |
| 37 | access the SPI NOR flash on platforms embedding this Designware |
| 38 | IP core. |
| 39 | |
Jagan Teki | c354eee | 2015-06-27 15:32:19 +0530 | [diff] [blame] | 40 | config EXYNOS_SPI |
| 41 | bool "Samsung Exynos SPI driver" |
| 42 | help |
| 43 | Enable the Samsung Exynos SPI driver. This driver can be used to |
| 44 | access the SPI NOR flash on platforms embedding this Samsung |
| 45 | Exynos IP core. |
| 46 | |
Jagan Teki | 94ea308 | 2015-06-27 14:17:06 +0530 | [diff] [blame] | 47 | config FSL_DSPI |
| 48 | bool "Freescale DSPI driver" |
| 49 | help |
| 50 | Enable the Freescale DSPI driver. This driver can be used to |
| 51 | access the SPI NOR flash and SPI Data flash on platforms embedding |
| 52 | this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms |
| 53 | use this driver. |
| 54 | |
Jagan Teki | 91c22d0 | 2015-06-27 15:23:07 +0530 | [diff] [blame] | 55 | config FSL_QSPI |
| 56 | bool "Freescale QSPI driver" |
| 57 | help |
| 58 | Enable the Freescale Quad-SPI (QSPI) driver. This driver can be |
| 59 | used to access the SPI NOR flash on platforms embedding this |
| 60 | Freescale IP core. |
| 61 | |
Jagan Teki | 4563601 | 2015-06-27 15:43:27 +0530 | [diff] [blame] | 62 | config ICH_SPI |
| 63 | bool "Intel ICH SPI driver" |
| 64 | help |
| 65 | Enable the Intel ICH SPI driver. This driver can be used to |
| 66 | access the SPI NOR flash on platforms embedding this Intel |
| 67 | ICH IP core. |
| 68 | |
Simon Glass | 1b2fd5b | 2015-09-01 19:19:37 -0600 | [diff] [blame] | 69 | config ROCKCHIP_SPI |
| 70 | bool "Rockchip SPI driver" |
| 71 | help |
| 72 | Enable the Rockchip SPI driver, used to access SPI NOR flash and |
| 73 | other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. |
| 74 | This uses driver model and requires a device tree binding to |
| 75 | operate. |
| 76 | |
Simon Glass | 892cac7 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 77 | config SANDBOX_SPI |
| 78 | bool "Sandbox SPI driver" |
| 79 | depends on SANDBOX && DM |
| 80 | help |
| 81 | Enable SPI support for sandbox. This is an emulation of a real SPI |
| 82 | bus. Devices can be attached to the bus using the device tree |
| 83 | which specifies the driver to use. As an example, see this device |
| 84 | tree fragment from sandbox.dts. It shows that the SPI bus has a |
| 85 | single flash device on chip select 0 which is emulated by the driver |
| 86 | for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. |
| 87 | |
| 88 | spi@0 { |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; |
| 91 | reg = <0>; |
| 92 | compatible = "sandbox,spi"; |
| 93 | cs-gpios = <0>, <&gpio_a 0>; |
| 94 | flash@0 { |
| 95 | reg = <0>; |
| 96 | compatible = "spansion,m25p16", "sandbox,spi-flash"; |
| 97 | spi-max-frequency = <40000000>; |
| 98 | sandbox,filename = "spi.bin"; |
| 99 | }; |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 100 | }; |
Jagan Teki | f924a20 | 2015-06-27 04:41:11 +0530 | [diff] [blame] | 101 | |
Jagan Teki | 5bf9a2d | 2015-06-27 15:57:53 +0530 | [diff] [blame] | 102 | config TEGRA114_SPI |
| 103 | bool "nVidia Tegra114 SPI driver" |
| 104 | help |
| 105 | Enable the nVidia Tegra114 SPI driver. This driver can be used to |
| 106 | access the SPI NOR flash on platforms embedding this nVidia Tegra114 |
| 107 | IP core. |
| 108 | |
| 109 | This controller is different than the older SoCs SPI controller and |
| 110 | also register interface get changed with this controller. |
| 111 | |
Jagan Teki | 2f3e6f8 | 2015-06-27 16:04:05 +0530 | [diff] [blame] | 112 | config TEGRA20_SFLASH |
| 113 | bool "nVidia Tegra20 Serial Flash controller driver" |
| 114 | help |
| 115 | Enable the nVidia Tegra20 Serial Flash controller driver. This driver |
| 116 | can be used to access the SPI NOR flash on platforms embedding this |
| 117 | nVidia Tegra20 IP core. |
| 118 | |
Jagan Teki | 4495830 | 2015-06-27 16:07:54 +0530 | [diff] [blame] | 119 | config TEGRA20_SLINK |
| 120 | bool "nVidia Tegra20/Tegra30 SLINK driver" |
| 121 | help |
| 122 | Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can |
| 123 | be used to access the SPI NOR flash on platforms embedding this |
| 124 | nVidia Tegra20/Tegra30 IP cores. |
| 125 | |
Tom Warren | 4e675ff | 2015-10-12 14:50:54 -0700 | [diff] [blame] | 126 | config TEGRA210_QSPI |
| 127 | bool "nVidia Tegra210 QSPI driver" |
| 128 | help |
| 129 | Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver |
| 130 | be used to access SPI chips on platforms embedding this |
| 131 | NVIDIA Tegra210 IP core. |
| 132 | |
Jagan Teki | 075143d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 133 | config XILINX_SPI |
| 134 | bool "Xilinx SPI driver" |
Jagan Teki | 075143d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 135 | help |
| 136 | Enable the Xilinx SPI driver from the Xilinx EDK. This SPI |
| 137 | controller support 8 bit SPI transfers only, with or w/o FIFO. |
| 138 | For more info on Xilinx SPI Register Definitions and Overview |
| 139 | see driver file - drivers/spi/xilinx_spi.c |
| 140 | |
Jagan Teki | df30a42 | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 141 | config ZYNQ_SPI |
| 142 | bool "Zynq SPI driver" |
Michal Simek | 8e4920e | 2015-12-07 11:33:58 +0100 | [diff] [blame] | 143 | depends on ARCH_ZYNQ || ARCH_ZYNQMP |
Jagan Teki | df30a42 | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 144 | help |
| 145 | Enable the Zynq SPI driver. This driver can be used to |
| 146 | access the SPI NOR flash on platforms embedding this Zynq |
| 147 | SPI IP core. |
Jagan Teki | de82305 | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 148 | |
Jagan Teki | 78a025a | 2015-08-16 00:19:38 +0530 | [diff] [blame] | 149 | config ZYNQ_QSPI |
| 150 | bool "Zynq QSPI driver" |
| 151 | depends on ARCH_ZYNQ |
| 152 | help |
| 153 | Enable the Zynq Quad-SPI (QSPI) driver. This driver can be |
| 154 | used to access the SPI NOR flash on platforms embedding this |
| 155 | Zynq QSPI IP core. This IP is used to connect the flash in |
| 156 | 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. |
| 157 | |
Jagan Teki | 77b8d04 | 2016-03-14 22:41:24 +0530 | [diff] [blame] | 158 | config OMAP3_SPI |
| 159 | bool "McSPI driver for OMAP" |
| 160 | help |
| 161 | SPI master controller for OMAP24XX and later Multichannel SPI |
| 162 | (McSPI). This driver be used to access SPI chips on platforms |
| 163 | embedding this OMAP3 McSPI IP core. |
| 164 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 165 | endif # if DM_SPI |
| 166 | |
Jagan Teki | 3debffa | 2015-06-27 15:21:36 +0530 | [diff] [blame] | 167 | config FSL_ESPI |
| 168 | bool "Freescale eSPI driver" |
| 169 | help |
| 170 | Enable the Freescale eSPI driver. This driver can be used to |
| 171 | access the SPI interface and SPI NOR flash on platforms embedding |
| 172 | this Freescale eSPI IP core. |
| 173 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 174 | config TI_QSPI |
| 175 | bool "TI QSPI driver" |
| 176 | help |
| 177 | Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. |
| 178 | This driver support spi flash single, quad and memory reads. |
| 179 | |
Jagan Teki | de82305 | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 180 | endmenu # menu "SPI Support" |