Simon Glass | c6af2e7 | 2012-07-29 20:53:27 +0000 | [diff] [blame] | 1 | NAND Flash |
| 2 | ---------- |
| 3 | |
| 4 | (there isn't yet a generic binding in Linux, so this describes what is in |
| 5 | U-Boot. There should not be Linux-specific or U-Boot specific binding, just |
| 6 | a binding that describes this hardware. But agreeing a binding in Linux in |
| 7 | the absence of a driver may be beyond my powers.) |
| 8 | |
| 9 | The device node for a NAND flash device is as follows: |
| 10 | |
| 11 | Required properties : |
| 12 | - compatible : Should be "manufacturer,device", "nand-flash" |
| 13 | |
| 14 | This node should sit inside its controller. |
| 15 | |
| 16 | |
| 17 | Nvidia NAND Controller |
| 18 | ---------------------- |
| 19 | |
| 20 | The device node for a NAND flash controller is as follows: |
| 21 | |
| 22 | Optional properties: |
| 23 | |
| 24 | nvidia,wp-gpios : GPIO of write-protect line, three cells in the format: |
| 25 | phandle, parameter, flags |
| 26 | nvidia,nand-width : bus width of the NAND device in bits |
| 27 | |
| 28 | - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns. |
| 29 | Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH), |
| 30 | TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL |
| 31 | |
| 32 | MAX_TRP_TREA is: |
| 33 | non-EDO mode: Max(tRP, tREA) + 6ns |
| 34 | EDO mode: tRP timing |
| 35 | |
| 36 | The 'reg' property should provide the chip select used by the flash chip. |
| 37 | |
| 38 | |
| 39 | Example |
| 40 | ------- |
| 41 | |
| 42 | nand-controller@0x70008000 { |
| 43 | compatible = "nvidia,tegra20-nand"; |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */ |
| 47 | nvidia,nand-width = <8>; |
| 48 | nvidia,timing = <26 100 20 80 20 10 12 10 70>; |
| 49 | nand@0 { |
| 50 | reg = <0>; |
| 51 | compatible = "hynix,hy27uf4g2b", "nand-flash"; |
| 52 | }; |
| 53 | }; |