blob: 46cf83be02e0418b4c156dd6d5ef92a1463e7a85 [file] [log] [blame]
David Feng12916822013-12-14 11:47:37 +08001/*
2 * Configuration for Versatile Express. Parts were derived from other ARM
3 * configurations.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __VEXPRESS_AEMV8A_H
9#define __VEXPRESS_AEMV8A_H
10
Linus Walleijf91afc42015-01-23 11:50:53 +010011#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambo261d2762014-06-09 11:12:59 -070012#ifndef CONFIG_SEMIHOSTING
Linus Walleijf91afc42015-01-23 11:50:53 +010013#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
Darwin Rambo261d2762014-06-09 11:12:59 -070014#endif
Darwin Rambo261d2762014-06-09 11:12:59 -070015#define CONFIG_ARMV8_SWITCH_TO_EL1
16#endif
17
David Feng12916822013-12-14 11:47:37 +080018#define CONFIG_REMAKE_ELF
19
David Feng12916822013-12-14 11:47:37 +080020#define CONFIG_SUPPORT_RAW_INITRD
21
Alexander Grafe593bf52016-03-04 01:09:51 +010022/* MMU Definitions */
23#define CONFIG_SYS_CACHELINE_SIZE 64
David Feng12916822013-12-14 11:47:37 +080024
25#define CONFIG_IDENT_STRING " vexpress_aemv8a"
David Feng12916822013-12-14 11:47:37 +080026
27/* Link Definitions */
Ryan Harkinfc04b922015-10-09 17:18:02 +010028#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
29 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
Darwin Rambo261d2762014-06-09 11:12:59 -070030/* ATF loads u-boot here for BASE_FVP model */
31#define CONFIG_SYS_TEXT_BASE 0x88000000
32#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
Linus Walleijffc10372015-01-23 14:41:10 +010033#elif CONFIG_TARGET_VEXPRESS64_JUNO
34#define CONFIG_SYS_TEXT_BASE 0xe0000000
35#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
Darwin Rambo261d2762014-06-09 11:12:59 -070036#endif
David Feng12916822013-12-14 11:47:37 +080037
Ryan Harkin0d3012a2015-10-09 17:18:01 +010038#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
39
David Feng12916822013-12-14 11:47:37 +080040/* CS register bases for the original memory map. */
41#define V2M_PA_CS0 0x00000000
42#define V2M_PA_CS1 0x14000000
43#define V2M_PA_CS2 0x18000000
44#define V2M_PA_CS3 0x1c000000
45#define V2M_PA_CS4 0x0c000000
46#define V2M_PA_CS5 0x10000000
47
48#define V2M_PERIPH_OFFSET(x) (x << 16)
49#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
50#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
51#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
52
53#define V2M_BASE 0x80000000
54
David Feng12916822013-12-14 11:47:37 +080055/* Common peripherals relative to CS7. */
56#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
57#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
58#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
59#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
60
Linus Walleijffc10372015-01-23 14:41:10 +010061#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
62#define V2M_UART0 0x7ff80000
63#define V2M_UART1 0x7ff70000
64#else /* Not Juno */
David Feng12916822013-12-14 11:47:37 +080065#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
66#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
67#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
68#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
Linus Walleijffc10372015-01-23 14:41:10 +010069#endif
David Feng12916822013-12-14 11:47:37 +080070
71#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
72
73#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
74#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
75
76#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
77#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
78
79#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
80
81#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
82
83/* System register offsets. */
84#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
85#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
86#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
87
88/* Generic Timer Definitions */
89#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
90
91/* Generic Interrupt Controller Definitions */
David Fengc71645a2014-03-14 14:26:27 +080092#ifdef CONFIG_GICV3
93#define GICD_BASE (0x2f000000)
94#define GICR_BASE (0x2f100000)
95#else
Darwin Rambo261d2762014-06-09 11:12:59 -070096
Ryan Harkinfc04b922015-10-09 17:18:02 +010097#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
98 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
Darwin Rambo261d2762014-06-09 11:12:59 -070099#define GICD_BASE (0x2f000000)
100#define GICC_BASE (0x2c000000)
Linus Walleijffc10372015-01-23 14:41:10 +0100101#elif CONFIG_TARGET_VEXPRESS64_JUNO
102#define GICD_BASE (0x2C010000)
103#define GICC_BASE (0x2C02f000)
David Fengc71645a2014-03-14 14:26:27 +0800104#endif
Linus Walleij03314f02015-03-23 11:06:14 +0100105#endif /* !CONFIG_GICV3 */
David Feng12916822013-12-14 11:47:37 +0800106
David Feng12916822013-12-14 11:47:37 +0800107/* Size of malloc() pool */
Tom Rini5bcae132014-08-14 06:42:37 -0400108#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
David Feng12916822013-12-14 11:47:37 +0800109
Linus Walleijb31f9d72015-02-17 11:35:25 +0100110/* Ethernet Configuration */
111#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
112/* The real hardware Versatile express uses SMSC9118 */
113#define CONFIG_SMC911X 1
114#define CONFIG_SMC911X_32_BIT 1
115#define CONFIG_SMC911X_BASE (0x018000000)
116#else
117/* The Vexpress64 simulators use SMSC91C111 */
Bhupesh Sharma3865ceb2014-01-16 09:47:40 -0600118#define CONFIG_SMC91111 1
119#define CONFIG_SMC91111_BASE (0x01A000000)
Linus Walleijb31f9d72015-02-17 11:35:25 +0100120#endif
David Feng12916822013-12-14 11:47:37 +0800121
122/* PL011 Serial Configuration */
Linus Walleijd280ea02015-04-14 10:01:35 +0200123#define CONFIG_BAUDRATE 115200
David Fengd8bafe132015-01-31 11:55:29 +0800124#define CONFIG_CONS_INDEX 0
Linus Walleijd280ea02015-04-14 10:01:35 +0200125#define CONFIG_PL01X_SERIAL
David Feng12916822013-12-14 11:47:37 +0800126#define CONFIG_PL011_SERIAL
Linus Walleijffc10372015-01-23 14:41:10 +0100127#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
128#define CONFIG_PL011_CLOCK 7273800
129#else
David Feng12916822013-12-14 11:47:37 +0800130#define CONFIG_PL011_CLOCK 24000000
Linus Walleijffc10372015-01-23 14:41:10 +0100131#endif
David Feng12916822013-12-14 11:47:37 +0800132
133/* Command line configuration */
134#define CONFIG_MENU
135/*#define CONFIG_MENU_SHOW*/
Tom Rini67172522014-08-14 06:42:38 -0400136#define CONFIG_CMD_BOOTI
137#define CONFIG_CMD_UNZIP
David Feng12916822013-12-14 11:47:37 +0800138#define CONFIG_CMD_PXE
139#define CONFIG_CMD_ENV
David Feng12916822013-12-14 11:47:37 +0800140#define CONFIG_DOS_PARTITION
141
142/* BOOTP options */
143#define CONFIG_BOOTP_BOOTFILESIZE
144#define CONFIG_BOOTP_BOOTPATH
145#define CONFIG_BOOTP_GATEWAY
146#define CONFIG_BOOTP_HOSTNAME
147#define CONFIG_BOOTP_PXE
David Feng12916822013-12-14 11:47:37 +0800148
149/* Miscellaneous configurable options */
150#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
151
152/* Physical Memory Map */
David Feng12916822013-12-14 11:47:37 +0800153#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
Linus Walleij30355702015-05-11 10:03:57 +0200154/* Top 16MB reserved for secure world use */
155#define DRAM_SEC_SIZE 0x01000000
156#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
157#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
158
Ryan Harkin2c2b2182015-11-18 10:39:07 +0000159#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
160#define CONFIG_NR_DRAM_BANKS 2
161#define PHYS_SDRAM_2 (0x880000000)
162#define PHYS_SDRAM_2_SIZE 0x180000000
163#else
164#define CONFIG_NR_DRAM_BANKS 1
165#endif
166
Linus Walleij30355702015-05-11 10:03:57 +0200167/* Enable memtest */
Linus Walleij30355702015-05-11 10:03:57 +0200168#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
169#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
David Feng12916822013-12-14 11:47:37 +0800170
171/* Initial environment variables */
Linus Walleij10d14912015-04-05 01:48:32 +0200172#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
173/*
174 * Defines where the kernel and FDT exist in NOR flash and where it will
175 * be copied into DRAM
176 */
177#define CONFIG_EXTRA_ENV_SETTINGS \
Ryan Harkinecbed5d2015-10-09 17:18:07 +0100178 "kernel_name=norkern\0" \
179 "kernel_alt_name=Image\0" \
Andre Przywara7babe482016-01-04 15:43:36 +0000180 "kernel_addr=0x80080000\0" \
Ryan Harkin4a6bdb52015-10-09 17:18:06 +0100181 "initrd_name=ramdisk.img\0" \
182 "initrd_addr=0x84000000\0" \
Alexander Grafda3e6202016-03-04 01:10:11 +0100183 "fdtfile=board.dtb\0" \
Ryan Harkinecbed5d2015-10-09 17:18:07 +0100184 "fdt_alt_name=juno\0" \
Linus Walleij10d14912015-04-05 01:48:32 +0200185 "fdt_addr=0x83000000\0" \
186 "fdt_high=0xffffffffffffffff\0" \
187 "initrd_high=0xffffffffffffffff\0" \
188
189/* Assume we boot with root on the first partition of a USB stick */
190#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
Ryan Harkin492f24e2015-10-09 17:18:08 +0100191 "root=/dev/sda2 rw " \
Linus Walleij33665f72015-05-14 17:38:33 +0200192 "rootwait "\
Ryan Harkinc0ae9702015-10-09 17:17:59 +0100193 "earlyprintk=pl011,0x7ff80000 debug "\
194 "user_debug=31 "\
Ryan Harkin74e264b2015-10-09 17:18:03 +0100195 "androidboot.hardware=juno "\
Linus Walleij10d14912015-04-05 01:48:32 +0200196 "loglevel=9"
197
198/* Copy the kernel and FDT to DRAM memory and boot */
199#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
Ryan Harkinecbed5d2015-10-09 17:18:07 +0100200 "if test $? -eq 1; then "\
201 " echo Loading ${kernel_alt_name} instead of "\
202 "${kernel_name}; "\
203 " afs load ${kernel_alt_name} ${kernel_addr};"\
204 "fi ; "\
Alexander Grafda3e6202016-03-04 01:10:11 +0100205 "afs load ${fdtfile} ${fdt_addr} ; " \
Ryan Harkinecbed5d2015-10-09 17:18:07 +0100206 "if test $? -eq 1; then "\
207 " echo Loading ${fdt_alt_name} instead of "\
Alexander Grafda3e6202016-03-04 01:10:11 +0100208 "${fdtfile}; "\
Ryan Harkinecbed5d2015-10-09 17:18:07 +0100209 " afs load ${fdt_alt_name} ${fdt_addr}; "\
210 "fi ; "\
Linus Walleij10d14912015-04-05 01:48:32 +0200211 "fdt addr ${fdt_addr}; fdt resize; " \
Ryan Harkin4a6bdb52015-10-09 17:18:06 +0100212 "if afs load ${initrd_name} ${initrd_addr} ; "\
213 "then "\
214 " setenv initrd_param ${initrd_addr}; "\
215 " else setenv initrd_param -; "\
216 "fi ; " \
217 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
Linus Walleij10d14912015-04-05 01:48:32 +0200218
Linus Walleij10d14912015-04-05 01:48:32 +0200219
220#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
David Feng12916822013-12-14 11:47:37 +0800221#define CONFIG_EXTRA_ENV_SETTINGS \
Linus Walleij1fd0f922015-05-27 09:45:39 +0200222 "kernel_name=Image\0" \
Andre Przywara7babe482016-01-04 15:43:36 +0000223 "kernel_addr=0x80080000\0" \
Darwin Rambo261d2762014-06-09 11:12:59 -0700224 "initrd_name=ramdisk.img\0" \
Linus Walleij49995ff2015-03-23 11:06:12 +0100225 "initrd_addr=0x88000000\0" \
Alexander Grafda3e6202016-03-04 01:10:11 +0100226 "fdtfile=devtree.dtb\0" \
Linus Walleij49995ff2015-03-23 11:06:12 +0100227 "fdt_addr=0x83000000\0" \
Darwin Rambo261d2762014-06-09 11:12:59 -0700228 "fdt_high=0xffffffffffffffff\0" \
229 "initrd_high=0xffffffffffffffff\0"
230
231#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
232 "0x1c090000 debug user_debug=31 "\
233 "loglevel=9"
234
Linus Walleij49995ff2015-03-23 11:06:12 +0100235#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
Alexander Grafda3e6202016-03-04 01:10:11 +0100236 "smhload ${fdtfile} ${fdt_addr}; " \
Ryan Harkinc0ae9702015-10-09 17:17:59 +0100237 "smhload ${initrd_name} ${initrd_addr} "\
238 "initrd_end; " \
Linus Walleij1fd0f922015-05-27 09:45:39 +0200239 "fdt addr ${fdt_addr}; fdt resize; " \
240 "fdt chosen ${initrd_addr} ${initrd_end}; " \
241 "booti $kernel_addr - $fdt_addr"
Darwin Rambo261d2762014-06-09 11:12:59 -0700242
Darwin Rambo261d2762014-06-09 11:12:59 -0700243
Ryan Harkinfc04b922015-10-09 17:18:02 +0100244#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
245#define CONFIG_EXTRA_ENV_SETTINGS \
246 "kernel_addr=0x80080000\0" \
247 "initrd_addr=0x84000000\0" \
248 "fdt_addr=0x83000000\0" \
249 "fdt_high=0xffffffffffffffff\0" \
250 "initrd_high=0xffffffffffffffff\0"
251
252#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
253 "0x1c090000 debug user_debug=31 "\
254 "androidboot.hardware=fvpbase "\
255 "root=/dev/vda2 rw "\
256 "rootwait "\
257 "loglevel=9"
258
259#define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
260
Ryan Harkinfc04b922015-10-09 17:18:02 +0100261
Darwin Rambo261d2762014-06-09 11:12:59 -0700262#endif
David Feng12916822013-12-14 11:47:37 +0800263
David Feng12916822013-12-14 11:47:37 +0800264/* Monitor Command Prompt */
265#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
David Feng12916822013-12-14 11:47:37 +0800266#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
267 sizeof(CONFIG_SYS_PROMPT) + 16)
David Feng12916822013-12-14 11:47:37 +0800268#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
269#define CONFIG_SYS_LONGHELP
Tom Rini5bcae132014-08-14 06:42:37 -0400270#define CONFIG_CMDLINE_EDITING
David Feng12916822013-12-14 11:47:37 +0800271#define CONFIG_SYS_MAXARGS 64 /* max command args */
272
Ryan Harkinf3c71c92015-11-18 10:39:09 +0000273#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
274#define CONFIG_SYS_FLASH_BASE 0x08000000
275/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
276#define CONFIG_SYS_MAX_FLASH_SECT 259
277/* Store environment at top of flash in the same location as blank.img */
278/* in the Juno firmware. */
279#define CONFIG_ENV_ADDR 0x0BFC0000
280#define CONFIG_ENV_SECT_SIZE 0x00010000
Linus Walleij14f264e2015-02-19 17:19:37 +0100281#else
Ryan Harkinf3c71c92015-11-18 10:39:09 +0000282#define CONFIG_SYS_FLASH_BASE 0x0C000000
283/* 256 x 256KiB sectors */
284#define CONFIG_SYS_MAX_FLASH_SECT 256
285/* Store environment at top of flash */
286#define CONFIG_ENV_ADDR 0x0FFC0000
287#define CONFIG_ENV_SECT_SIZE 0x00040000
288#endif
289
Linus Walleij14f264e2015-02-19 17:19:37 +0100290#define CONFIG_SYS_FLASH_CFI 1
291#define CONFIG_FLASH_CFI_DRIVER 1
Ryan Harkinf19f3892015-05-08 18:07:52 +0100292#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
Ryan Harkinf3c71c92015-11-18 10:39:09 +0000293#define CONFIG_SYS_MAX_FLASH_BANKS 1
Linus Walleij14f264e2015-02-19 17:19:37 +0100294
Linus Walleij14f264e2015-02-19 17:19:37 +0100295#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
296#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
297#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
Ryan Harkinf3c71c92015-11-18 10:39:09 +0000298#define FLASH_MAX_SECTOR_SIZE 0x00040000
299#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
300#define CONFIG_ENV_IS_IN_FLASH 1
Linus Walleij14f264e2015-02-19 17:19:37 +0100301
David Feng12916822013-12-14 11:47:37 +0800302#endif /* __VEXPRESS_AEMV8A_H */