huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | #ifndef __CONFIG_RK3036_COMMON_H |
| 7 | #define __CONFIG_RK3036_COMMON_H |
| 8 | |
Albert ARIBAUD | 3709844 | 2016-01-27 08:46:11 +0100 | [diff] [blame] | 9 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
| 10 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 11 | #include <asm/arch/hardware.h> |
| 12 | |
| 13 | #define CONFIG_SYS_NO_FLASH |
| 14 | #define CONFIG_NR_DRAM_BANKS 1 |
| 15 | #define CONFIG_ENV_IS_NOWHERE |
| 16 | #define CONFIG_ENV_SIZE 0x2000 |
| 17 | #define CONFIG_SYS_MAXARGS 16 |
| 18 | #define CONFIG_BAUDRATE 115200 |
| 19 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
| 20 | #define CONFIG_SYS_CBSIZE 1024 |
| 21 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 22 | #define CONFIG_SYS_THUMB_BUILD |
| 23 | #define CONFIG_DISPLAY_BOARDINFO |
| 24 | |
| 25 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) |
| 26 | #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ |
| 27 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) |
| 28 | |
Simon Glass | 9b20519 | 2015-12-13 21:37:00 -0700 | [diff] [blame] | 29 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 30 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 31 | #define CONFIG_SYS_NS16550 |
| 32 | #define CONFIG_SYS_NS16550_MEM32 |
| 33 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 34 | #define CONFIG_SYS_TEXT_BASE 0x60000000 |
| 35 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 |
| 36 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 |
| 37 | #define CONFIG_SPL_STACK 0x10081fff |
| 38 | #define CONFIG_SPL_TEXT_BASE 0x10081004 |
| 39 | |
| 40 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) |
| 41 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |
| 42 | |
| 43 | #define CONFIG_ROCKCHIP_COMMON |
| 44 | |
| 45 | /* MMC/SD IP block */ |
| 46 | #define CONFIG_MMC |
| 47 | #define CONFIG_GENERIC_MMC |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 48 | #define CONFIG_SDHCI |
| 49 | #define CONFIG_DWMMC |
| 50 | #define CONFIG_BOUNCE_BUFFER |
| 51 | |
| 52 | #define CONFIG_DOS_PARTITION |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 53 | #define CONFIG_FAT_WRITE |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 54 | #define CONFIG_PARTITION_UUIDS |
| 55 | #define CONFIG_CMD_PART |
| 56 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 57 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
| 58 | #define CONFIG_NR_DRAM_BANKS 1 |
| 59 | #define SDRAM_BANK_SIZE (512UL << 20UL) |
| 60 | |
| 61 | #define CONFIG_SPI_FLASH |
| 62 | #define CONFIG_SPI |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 63 | #define CONFIG_SPI_FLASH_GIGADEVICE |
| 64 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
| 65 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 66 | #ifndef CONFIG_SPL_BUILD |
| 67 | #include <config_distro_defaults.h> |
| 68 | |
| 69 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 70 | "scriptaddr=0x60000000\0" \ |
| 71 | "pxefile_addr_r=0x60100000\0" \ |
| 72 | "fdt_addr_r=0x61f00000\0" \ |
| 73 | "kernel_addr_r=0x62000000\0" \ |
| 74 | "ramdisk_addr_r=0x64000000\0" |
| 75 | |
| 76 | /* First try to boot from SD (index 0), then eMMC (index 1 */ |
| 77 | #define BOOT_TARGET_DEVICES(func) \ |
| 78 | func(MMC, mmc, 0) \ |
| 79 | func(MMC, mmc, 1) |
| 80 | |
| 81 | #include <config_distro_bootcmd.h> |
| 82 | |
| 83 | /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, |
| 84 | * so limit the fdt reallocation to that */ |
| 85 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 86 | "fdt_high=0x7fffffff\0" \ |
| 87 | ENV_MEM_LAYOUT_SETTINGS \ |
| 88 | BOOTENV |
| 89 | #endif |
| 90 | |
| 91 | #endif |