Mateusz Kulikowski | 5b47271 | 2016-03-31 23:12:29 +0200 | [diff] [blame] | 1 | Qualcomm SPMI arbiter/bus driver |
| 2 | |
| 3 | This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. |
| 4 | |
| 5 | Required properties: |
| 6 | - compatible: "qcom,spmi-pmic-arb" |
| 7 | - reg: Register block adresses and sizes for various parts of device: |
| 8 | 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) |
| 9 | 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) |
| 10 | 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) |
| 11 | |
| 12 | Optional properties (if not set by parent): |
| 13 | - #address-cells: 0x1 - childs slave ID address |
| 14 | - #size-cells: 0x1 |
| 15 | |
| 16 | All PMICs should be placed as a child nodes of bus arbiter. |
| 17 | Automatic detection of childs is currently not supported. |
| 18 | |
| 19 | Example: |
| 20 | |
| 21 | spmi@200f000 { |
| 22 | compatible = "qcom,spmi-pmic-arb"; |
| 23 | reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; |
| 24 | #address-cells = <0x1>; |
| 25 | #size-cells = <0x1>; |
| 26 | }; |