blob: 3bb83f359ee4fc325b21c0f396a801e60ff25725 [file] [log] [blame]
Simon Guinot79642092011-06-17 19:41:33 +05301/*
2 * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3 *
4 * Based on Kirkwood support:
5 * (C) Copyright 2009
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23#include <common.h>
24#include <miiphy.h>
25#include <netdev.h>
26#include <command.h>
27#include <asm/arch/kirkwood.h>
28#include <asm/arch/mpp.h>
29#include <asm/arch/gpio.h>
30#include "netspace_v2.h"
31
32DECLARE_GLOBAL_DATA_PTR;
33
34int board_early_init_f(void)
35{
36 /* Gpio configuration */
37 kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
38 NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
39
40 /* Multi-Purpose Pins Functionality configuration */
41 u32 kwmpp_config[] = {
42 MPP0_SPI_SCn,
43 MPP1_SPI_MOSI,
44 MPP2_SPI_SCK,
45 MPP3_SPI_MISO,
46 MPP4_NF_IO6,
47 MPP5_NF_IO7,
48 MPP6_SYSRST_OUTn,
49 MPP7_GPO, /* Fan speed (bit 1) */
50 MPP8_TW_SDA,
51 MPP9_TW_SCK,
52 MPP10_UART0_TXD,
53 MPP11_UART0_RXD,
54 MPP12_GPO, /* Red led */
55 MPP14_GPIO, /* USB fuse */
56 MPP16_GPIO, /* SATA 0 power */
57 MPP17_GPIO, /* SATA 1 power */
58 MPP18_NF_IO0,
59 MPP19_NF_IO1,
60 MPP20_SATA1_ACTn,
61 MPP21_SATA0_ACTn,
62 MPP22_GPIO, /* Fan speed (bit 0) */
63 MPP23_GPIO, /* Fan power */
64 MPP24_GPIO, /* USB mode select */
65 MPP25_GPIO, /* Fan rotation fail */
66 MPP26_GPIO, /* USB vbus-in detection */
67 MPP28_GPIO, /* USB enable vbus-out */
68 MPP29_GPIO, /* Blue led (slow register) */
69 MPP30_GPIO, /* Blue led (command register) */
70 MPP31_GPIO, /* Board power off */
71 MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
72 MPP33_GPIO, /* Fan speed (bit 2) */
73 0
74 };
75 kirkwood_mpp_conf(kwmpp_config);
76
77 return 0;
78}
79
80int board_init(void)
81{
82 /* Machine number */
83 gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
84
85 /* Boot parameters address */
86 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
87
88 return 0;
89}
90
91void mv_phy_88e1116_init(char *name)
92{
93 u16 reg;
94 u16 devadr;
95
96 if (miiphy_set_current_dev(name))
97 return;
98
99 /* command to read PHY dev address */
100 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
101 printf("Err..(%s) could not read PHY dev address\n", __func__);
102 return;
103 }
104
105 /*
106 * Enable RGMII delay on Tx and Rx for CPU port
107 * Ref: sec 4.7.2 of chip datasheet
108 */
109 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
110 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
111 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
112 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
113 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
114
115 /* reset the phy */
116 if (miiphy_read(name, devadr, MII_BMCR, &reg) != 0) {
117 printf("Err..(%s) PHY status read failed\n", __func__);
118 return;
119 }
120 if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
121 printf("Err..(%s) PHY reset failed\n", __func__);
122 return;
123 }
124
125 debug("88E1116 Initialized on %s\n", name);
126}
127
128/* Configure and initialize PHY */
129void reset_phy(void)
130{
131 mv_phy_88e1116_init("egiga0");
132}
133
134/* Return GPIO button status */
135static int
136do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
137{
138 return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
139}
140
141U_BOOT_CMD(button, 1, 1, do_read_button,
142 "Return GPIO button status 0=off 1=on", "");