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wdenk945af8d2003-07-16 21:53:01 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * CPU specific code for the MPC5xxx CPUs
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
31#include <mpc5xxx.h>
Ben Warrene1d74802008-08-31 10:39:12 -070032#include <netdev.h>
Grant Likelycf2817a2007-09-06 09:46:23 -060033#include <asm/io.h>
wdenk945af8d2003-07-16 21:53:01 +000034#include <asm/processor.h>
35
Grant Likelycf2817a2007-09-06 09:46:23 -060036#if defined(CONFIG_OF_LIBFDT)
37#include <libfdt.h>
38#include <libfdt_env.h>
Kumar Galae93becf2007-11-03 19:46:28 -050039#include <fdt_support.h>
Stefan Roesee59581c2006-11-28 17:55:49 +010040#endif
41
Wolfgang Denkd87080b2006-03-31 18:32:53 +020042DECLARE_GLOBAL_DATA_PTR;
43
wdenk945af8d2003-07-16 21:53:01 +000044int checkcpu (void)
45{
wdenk945af8d2003-07-16 21:53:01 +000046 ulong clock = gd->cpu_clk;
47 char buf[32];
wdenk36c72872004-06-09 17:45:32 +000048#ifndef CONFIG_MGT5100
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020049 uint svr, pvr;
wdenk36c72872004-06-09 17:45:32 +000050#endif
wdenk945af8d2003-07-16 21:53:01 +000051
52 puts ("CPU: ");
53
wdenk36c72872004-06-09 17:45:32 +000054#ifdef CONFIG_MGT5100
55 puts (CPU_ID_STR);
wdenk945af8d2003-07-16 21:53:01 +000056 printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
wdenk36c72872004-06-09 17:45:32 +000057#else
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020058 svr = get_svr();
59 pvr = get_pvr();
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020060
61 switch (pvr) {
62 case PVR_5200:
63 printf("MPC5200");
64 break;
65 case PVR_5200B:
66 printf("MPC5200B");
wdenk36c72872004-06-09 17:45:32 +000067 break;
68 default:
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020069 printf("Unknown MPC5xxx");
wdenk36c72872004-06-09 17:45:32 +000070 break;
71 }
72
Wolfgang Denkcf48eb92006-04-16 10:51:58 +020073 printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020074 PVR_MAJ(pvr), PVR_MIN(pvr));
wdenk36c72872004-06-09 17:45:32 +000075#endif
wdenk945af8d2003-07-16 21:53:01 +000076 printf (" at %s MHz\n", strmhz (buf, clock));
wdenk945af8d2003-07-16 21:53:01 +000077 return 0;
78}
79
80/* ------------------------------------------------------------------------- */
81
82int
83do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
84{
wdenkd94f92c2003-08-28 09:41:22 +000085 ulong msr;
wdenk945af8d2003-07-16 21:53:01 +000086 /* Interrupts and MMU off */
87 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
88
89 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
90 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
91
wdenkd94f92c2003-08-28 09:41:22 +000092 /* Charge the watchdog timer */
wdenk2d5b5612003-10-14 19:43:55 +000093 *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
wdenkd94f92c2003-08-28 09:41:22 +000094 *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
wdenk2d5b5612003-10-14 19:43:55 +000095 while(1);
wdenkd94f92c2003-08-28 09:41:22 +000096
wdenk945af8d2003-07-16 21:53:01 +000097 return 1;
98
99}
100
101/* ------------------------------------------------------------------------- */
102
103/*
104 * Get timebase clock frequency (like cpu_clk in Hz)
105 *
106 */
107unsigned long get_tbclk (void)
108{
wdenk945af8d2003-07-16 21:53:01 +0000109 ulong tbclk;
110
111 tbclk = (gd->bus_clk + 3L) / 4L;
112
113 return (tbclk);
114}
115
116/* ------------------------------------------------------------------------- */
Stefan Roesee59581c2006-11-28 17:55:49 +0100117
Marian Balakowicz75d3e8f2008-02-21 17:20:18 +0100118#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
Grant Likelycf2817a2007-09-06 09:46:23 -0600119void ft_cpu_setup(void *blob, bd_t *bd)
120{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121 int div = in_8((void*)CONFIG_SYS_MBAR + 0x204) & 0x0020 ? 8 : 4;
Grant Likelycf2817a2007-09-06 09:46:23 -0600122 char * cpu_path = "/cpus/" OF_CPU;
André Schwarzc5123892008-03-13 13:50:52 +0100123#ifdef CONFIG_MPC5xxx_FEC
Grant Likelycf2817a2007-09-06 09:46:23 -0600124 char * eth_path = "/" OF_SOC "/ethernet@3000";
André Schwarzc5123892008-03-13 13:50:52 +0100125#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100126
Kumar Galae93becf2007-11-03 19:46:28 -0500127 do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
128 do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
129 do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
130 do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
131 do_fixup_by_path_u32(blob, "/" OF_SOC, "system-frequency",
132 bd->bi_busfreq*div, 1);
André Schwarzc5123892008-03-13 13:50:52 +0100133#ifdef CONFIG_MPC5xxx_FEC
Kumar Galae93becf2007-11-03 19:46:28 -0500134 do_fixup_by_path(blob, eth_path, "mac-address", bd->bi_enetaddr, 6, 0);
135 do_fixup_by_path(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0);
André Schwarzc5123892008-03-13 13:50:52 +0100136#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100137}
138#endif
Axel Beierleinbef92e22008-08-16 00:30:48 +0200139
140#ifdef CONFIG_BOOTCOUNT_LIMIT
141
142void bootcount_store (ulong a)
143{
Wolfgang Denka49d10c2008-08-25 23:45:41 +0200144 volatile ulong *save_addr = (volatile ulong *) (MPC5XXX_CDM_BRDCRMB);
Axel Beierleinbef92e22008-08-16 00:30:48 +0200145
Wolfgang Denka49d10c2008-08-25 23:45:41 +0200146 *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a;
Axel Beierleinbef92e22008-08-16 00:30:48 +0200147}
148
149ulong bootcount_load (void)
150{
Wolfgang Denka49d10c2008-08-25 23:45:41 +0200151 volatile ulong *save_addr = (volatile ulong *) (MPC5XXX_CDM_BRDCRMB);
Axel Beierleinbef92e22008-08-16 00:30:48 +0200152
Wolfgang Denka49d10c2008-08-25 23:45:41 +0200153 if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
154 return 0;
155 else
156 return (*save_addr & 0x0000ffff);
Axel Beierleinbef92e22008-08-16 00:30:48 +0200157}
158#endif /* CONFIG_BOOTCOUNT_LIMIT */
Ben Warrene1d74802008-08-31 10:39:12 -0700159
160#ifdef CONFIG_MPC5xxx_FEC
161/* Default initializations for FEC controllers. To override,
162 * create a board-specific function called:
163 * int board_eth_init(bd_t *bis)
164 */
165
166int cpu_eth_init(bd_t *bis)
167{
168 return mpc5xxx_fec_initialize(bis);
169}
170#endif